On Mon, 14 Jan 2013, Yanqi Zhou wrote:
I used:
/gem5/build/ALPHA/gem5.opt --debug-flags=Exec,-ExecSymbol
--trace-start=2420065974500 --trace-file=/scratch/gpfs/yanqiz/%s_new.out
--outdir=m5out/%s configs/example/fs.py --caches --l1i_size=8kB --l1d_size=8kB
--cpu-type=detailed -I 2000000000
--script=/tigress-hsm/yanqiz/gem5/configs/boot/%s.rcS
2420073741500: system.cpu T0 : 0x4a85 : cmovlbs r37,r39,r36 : IntAlu
: D=0x0000000000000000
2420073741500: system.cpu T0 : 0x4a89 : bis r37,r31,r18 : IntAlu
: D=0x0000000000000001
2420081709500: system.cpu T0 : 0x6c11 : srl r37,32,r39 : IntAlu
: D=0x00000000eb58ac31
2420081710000: system.cpu T0 : 0x6c25 : addl r37,r39,r39 : IntAlu
: D=0x000000000bd7b491
2420081710000: system.cpu T0 : 0x6c29 : hw_st r25,24(r0),PHYS :
MemWrite : D=0x000000000bd7b491 A
2420081857000: system.cpu T0 : 0x486d : srl r22,62,r22 : IntAlu
: D=0x0000000000000000
2420081857000: system.cpu T0 : 0x4871 : bis r39,r36,r39 : IntAlu
: D=0x0000000164000000
2420081857000: system.cpu T0 : 0x4875 : srl r23,32,r24 : IntAlu
: D=0x000000000000003e
2420081857000: system.cpu T0 : 0x4879 : and r22,1,r22 : IntAlu
: D=0x0000000000000000
2420081857000: system.cpu T0 : 0x487d : sll r24,4,r36 : IntAlu
: D=0x00000000000003e0
2420081891000: system.cpu T0 : 0x4881 : sll r22,9,r22 : IntAlu
: D=0x0000000000000000
2420081891000: system.cpu T0 : 0x4885 : nop (bis r31,r31,r31) : No_OpClass :
2420081891000: system.cpu T0 : 0x4889 : bis r39,r22,r39 : IntAlu : D=0x0000000164000000
2420081891000: system.cpu T0 : 0x488d : sll r24,57,r24 : IntAlu
: D=0x7c00000000000000
2420081891000: system.cpu T0 : 0x4891 : subl r23,r37,r37 : IntAlu
: D=0x00000000eb5938ee
If you take a look at the file src/arch/alpha/registers.hh, it defines
r0-r31 to be integer registers and r32-r39 to be PAL shadow registers. So
it seems that you can see r32-r39 registers in the trace whenever the
processor is executing PAL code.
--
Nilay
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