Hi,
I am trying to optimize some benchmarks using LLVM and run them on gem5
simulator (build for ARM). I am using Sourcery Codebench cross-compiler for ARM
on my x-86 machine.
My steps up till now have been using the following commands to generate an ARM
executable by using the cross compiler.
1. clang -static -emit-llvm -march=armv7-a -mfloat-abi=soft -target arm-elf
a.cpp -c -integrated-as \
--sysroot=/home/silky/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/arm-none-linux-gnueabi/libc
\
-I/home/silky/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/arm-none-linux-gnueabi/include/c++/4.7.2/
\
-I/home/silky/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/arm-none-linux-gnueabi/include/c++/4.7.2/arm-none-linux-gnueabi/armv4t/
-o a.bc
2. llc -O3 -o a.s -march=arm a.bc
3. arm-none-linux-gnueabi-g++ -static a.s -o a_st
To run the final executable on gem5, I use
4. /gem5$build/ARM/gem5.debug configs/example/se.py -c
/home/silky/mbench/vect/a_st
This results in a page fault -
/home/silky/mbench/gem5/configs/common/CacheConfig.py:48: SyntaxWarning: import
* only allowed at module level
def config_cache(options, system):
Global frequency set at 1000000000000 ticks per second
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7010
**** REAL SIMULATION ****
info: Entering event queue @ 0. Starting simulation...
panic: Page table fault when accessing virtual address 0xfffffff4
@ cycle 2509500
[invoke:build/ARM/sim/faults.cc, line 70]
Memory Usage: 620144 KBytes
Program aborted at cycle 2509500
Aborted (core dumped)
Most of the search results talk about the executable not being statically
built. Could anyone please tell me if I went wrong somewhere, or how I can go
about debugging this.
Thanks and Regards,
Silky
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
