hello every body I want to run the radix benshmark on a 2D mesh topology , but i had a segmentation fault problem . i don't know from where it's caused. can you please help me to salve that ??
this is the commande line : ./build/ALPHA/gem5.opt --debug-flag=AddrDep,BADADDR,DebugPrintf,Event,ExecEffAddr,ExecEnable,ExecThread,RubyQueue,Fault,RubyPort,RubyStats configs/example/noc.py --rootdir="../splash/splash2/codes" --cpu-type='timing' --num-cpus=4 --num-dirs=2 --topology=Mesh --mesh-rows=2 --garnet-network=fixed --benchmark=Radix this is the result i have ( I am using a lot of messages 'print') : gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. gem5 compiled Apr 30 2013 16:14:15 gem5 started Apr 30 2013 16:58:45 gem5 executing on cimepe39 command line: ./build/ALPHA/gem5.opt --debug-flag=AddrDep,BADADDR,DebugPrintf,Event,ExecEffAddr,ExecEnable,ExecThread,RubyQueue,Fault,RubyPort,RubyStats configs/example/noc.py --rootdir=../splash/splash2/codes --cpu-type=timing --num-cpus=4 --num-dirs=2 --topology=Mesh --mesh-rows=2 --garnet-network=fixed --benchmark=Radix mapping nomber of nodes 6 nb remainder = 0 we have 3 columns we have 2 rows connect each node to the appropriate router [(0, <m5.objects.L1Cache_Controller.L1Cache_Controller object at 0x35c0e90>), (1, <m5.objects.L1Cache_Controller.L1Cache_Controller object at 0x35c3250>), (2, <m5.objects.L1Cache_Controller.L1Cache_Controller object at 0x35c3590>), (3, <m5.objects.L1Cache_Controller.L1Cache_Controller object at 0x35c38d0>), (4, <m5.objects.Directory_Controller.Directory_Controller object at 0x35c3d50>), (5, <m5.objects.Directory_Controller.Directory_Controller object at 0x35c50d0>)] control level for l1 controller node 0 rouetr id 0 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent link number 1 is added control level for l1 controller node 0 rouetr id 1 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent link number 2 is added control level for l1 controller node 0 rouetr id 2 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent link number 3 is added control level for l1 controller node 0 rouetr id 3 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent link number 4 is added control level for l1 controller node 0 rouetr id 4 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent link number 5 is added control level for l1 controller node 0 rouetr id 5 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent link number 6 is added [] linking the columns from east to west col : 0 , row : 0 east_id 0 west_id 1 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 7 is added col : 1 , row : 0 east_id 1 west_id 2 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 8 is added end of the row nb 0 col : 0 , row : 1 east_id 3 west_id 4 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 9 is added col : 1 , row : 1 east_id 4 west_id 5 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 10 is added end of the row nb 1 linking the rows from north to south col : 0 , row : 0 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 11 is added end of the column nb 0 col : 1 , row : 0 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 12 is added end of the column nb 1 col : 2 , row : 0 warn: add_child('cls'): child 'credit_links0 credit_links1' already has parent internal link number 13 is added end of the column nb 2 apres ruby create benchmark warn: add_child('workload'): child 'workload' already has parent mapping workload cpu : system.cpu0 warn: add_child('workload'): child 'workload' already has parent mapping workload cpu : system.cpu1 warn: add_child('workload'): child 'workload' already has parent mapping workload cpu : system.cpu2 warn: add_child('workload'): child 'workload' already has parent mapping workload cpu : system.cpu3 Global frequency set at 1000000000 ticks per second warn: rounding error > tolerance 0.072760 rounded to 0 warn: rounding error > tolerance 0.072760 rounded to 0 0: system.sys_port_proxy-pio-port: creating master port on ruby sequencer system.sys_port_proxy-pio-port 0: system.sys_port_proxy-slave0: creating slave port on ruby sequencer system.sys_port_proxy-slave0 0: system.ruby.l1_cntrl0.sequencer-pio-port: creating master port on ruby sequencer system.ruby.l1_cntrl0.sequencer-pio-port 0: system.ruby.l1_cntrl0.sequencer-slave0: creating slave port on ruby sequencer system.ruby.l1_cntrl0.sequencer-slave0 0: system.ruby.l1_cntrl1.sequencer-pio-port: creating master port on ruby sequencer system.ruby.l1_cntrl1.sequencer-pio-port 0: system.ruby.l1_cntrl1.sequencer-slave0: creating slave port on ruby sequencer system.ruby.l1_cntrl1.sequencer-slave0 0: system.ruby.l1_cntrl2.sequencer-pio-port: creating master port on ruby sequencer system.ruby.l1_cntrl2.sequencer-pio-port 0: system.ruby.l1_cntrl2.sequencer-slave0: creating slave port on ruby sequencer system.ruby.l1_cntrl2.sequencer-slave0 0: system.ruby.l1_cntrl3.sequencer-pio-port: creating master port on ruby sequencer system.ruby.l1_cntrl3.sequencer-pio-port 0: system.ruby.l1_cntrl3.sequencer-slave0: creating slave port on ruby sequencer system.ruby.l1_cntrl3.sequencer-slave0 0: Event_21: NetworkTest tick event scheduled @ 0 0: Event_22: NetworkTest tick event scheduled @ 0 0: Event_23: NetworkTest tick event scheduled @ 0 0: Event_24: NetworkTest tick event scheduled @ 0 Segmentation fault . here is my configuration file noc .py ( it includes some options with the benshmarks of the splash2 # Copyright (c) 2006-2007 The Regents of The University of Michigan # Copyright (c) 2009 Advanced Micro Devices, Inc. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are # met: redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer; # redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution; # neither the name of the copyright holders nor the names of its # contributors may be used to endorse or promote products derived from # this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # Authors: Ron Dreslinski # Brad Beckmann import m5 from m5.objects import * from m5.defines import buildEnv from m5.util import addToPath import os, optparse, sys addToPath('../common') addToPath('../ruby') addToPath('../topologies') addToPath('../../tests') import Options import Ruby import Simulation def get_processes(options): """Interprets provided options and returns a list of processes""" multiprocesses = [] inputs = [] outputs = [] errouts = [] pargs = [] workloads = options.cmd.split('_') if options.input != "": inputs = options.input.split(';') if options.output != "": outputs = options.output.split(';') if options.errout != "": errouts = options.errout.split(';') if options.options != "": pargs = options.options.split('_') idx = 0 for wrkld in workloads: process = LiveProcess() process.executable = wrkld if len(pargs) > idx: # process.cmd = [wrkld] + pargs[idx].split('_') # on ajoute to the workload the argements separated by an ' ' process.cmd = [wrkld] + pargs[idx].split() else: process.cmd = [wrkld] if len(inputs) > idx: process.input = inputs[idx] if len(outputs) > idx: process.output = outputs[idx] if len(errouts) > idx: process.errout = errouts[idx] multiprocesses.append(process) idx += 1 print " workload no : " , idx if options.smt: assert(options.cpu_type == "detailed" or options.cpu_type == "inorder") return multiprocesses, idx else: return multiprocesses, 1 # Get paths we might need. It's expected this file is in m5/configs/example. config_path = os.path.dirname(os.path.abspath(__file__)) config_root = os.path.dirname(config_path) m5_root = os.path.dirname(config_root) parser = optparse.OptionParser() Options.addCommonOptions(parser) Options.addSEOptions(parser) parser.add_option("-l", "--checks", metavar="N", default=100, help="Stop after N checks (loads)") parser.add_option("-f", "--wakeup_freq", metavar="N", default=10, help="Wakeup every N cycles") parser.add_option("--rootdir", help="Root directory of Splash2", default="/dist/splash2/codes") parser.add_option("-b", "--benchmark",default='', help="Splash 2 benchmark to run") parser.add_option( "--frequency", default = "1GHz", help="Frequency of each CPU") # # Add the ruby specific and protocol specific options # Ruby.define_options(parser) execfile(os.path.join(config_root, "common", "Options.py")) (options, args) = parser.parse_args() block_size = 64 if options.num_cpus > block_size: print "Error: Number of cores %d limited to %d because of false sharing" \ % (options.num_cpus, block_size) sys.exit(1) if args: print "Error: script doesn't take any positional arguments" sys.exit(1) #################################""""" # -------------------- # Define Splash2 Benchmarks # ==================== class Cholesky(LiveProcess): cwd = options.rootdir + '/kernels/cholesky' executable = options.rootdir + '/kernels/cholesky/CHOLESKY' cmd = ['CHOLESKY', '-p' + str(options.num_cpus), options.rootdir + '/kernels/cholesky/inputs/tk23.O','-s','-t'] class FFT(LiveProcess): cwd = options.rootdir + '/kernels/fft' executable = options.rootdir + '/kernels/fft/FFT' cmd = ['FFT', '-p', str(options.num_cpus), '-m18'] class LU_contig(LiveProcess): executable = options.rootdir + '/kernels/lu/contiguous_blocks/LU' cmd = ['LU', '-p', str(options.num_cpus),'-o', '-n' ,'5','-s','-t'] cwd = options.rootdir + '/kernels/lu/contiguous_blocks' class LU_noncontig(LiveProcess): executable = options.rootdir + '/kernels/lu/non_contiguous_blocks/LU' cmd = ['LU', '-p', str(options.num_cpus), '-o', '-n' ,'5','-s','-t'] cwd = options.rootdir + '/kernels/lu/non_contiguous_blocks' class Radix(LiveProcess): executable = options.rootdir + '/kernels/radix/RADIX' cmd = ['RADIX', '-n50', '-p', str(options.num_cpus),'-s','-t'] cwd = options.rootdir + '/kernels/radix' class Barnes(LiveProcess): executable = options.rootdir + '/apps/barnes/BARNES' cmd = ['BARNES'] input = options.rootdir + '/apps/barnes/input.p' + str(options.num_cpus) cwd = options.rootdir + '/apps/barnes' class FMM(LiveProcess): executable = options.rootdir + '/apps/fmm/FMM' cmd = ['FMM', '-o', '-s'] if str(options.num_cpus) == '1': input = options.rootdir + '/apps/fmm/inputs/input.2048' else: input = options.rootdir + '/apps/fmm/inputs/input.2048.p' + str(options.num_cpus) cwd = options.rootdir + '/apps/fmm' class Ocean_contig(LiveProcess): executable = options.rootdir + '/apps/ocean/contiguous_partitions/OCEAN' cmd = ['OCEAN', '-p', str(options.num_cpus)] cwd = options.rootdir + '/apps/ocean/contiguous_partitions' class Ocean_noncontig(LiveProcess): executable = options.rootdir + '/apps/ocean/non_contiguous_partitions/OCEAN' cmd = ['OCEAN', '-p', str(options.num_cpus)] cwd = options.rootdir + '/apps/ocean/non_contiguous_partitions' class Raytrace(LiveProcess): executable = options.rootdir + '/apps/raytrace/RAYTRACE' cmd = ['RAYTRACE', '-p' + str(options.num_cpus), options.rootdir + '/apps/raytrace/inputs/teapot.env'] cwd = options.rootdir + '/apps/raytrace' class Water_nsquared(LiveProcess): executable = options.rootdir + '/apps/water-nsquared/WATER-NSQUARED' cmd = ['WATER-NSQUARED'] if options.num_cpus==1: input = options.rootdir + '/apps/water-nsquared/input' else: input = options.rootdir + '/apps/water-nsquared/input.p' + str(options.num_cpus) cwd = options.rootdir + '/apps/water-nsquared' class Water_spatial(LiveProcess): executable = options.rootdir + '/apps/water-spatial/WATER-SPATIAL' cmd = ['WATER-SPATIAL'] if options.num_cpus==1: input = options.rootdir + '/apps/water-spatial/input' else: input = options.rootdir + '/apps/water-spatial/input.p' + str(options.num_cpus) cwd = options.rootdir + '/apps/water-spatial' ######################################## # # Set the default cache size and associativity to be very small to encourage # races between requests and writebacks. # options.l1d_size="256B" options.l1i_size="256B" options.l2_size="1MB" options.l3_size="1kB" options.l1d_assoc=2 options.l1i_assoc=2 options.l2_assoc=2 options.l3_assoc=2 multiprocesses = [] numThreads = 1 if options.bench: apps = options.bench.split("-") if len(apps) != options.num_cpus: print "number of benchmarks not equal to set num_cpus!" sys.exit(1) for app in apps: try: if buildEnv['TARGET_ISA'] == 'alpha': exec("workload = %s('alpha', 'tru64', 'ref')" % app) else: exec("workload = %s(buildEnv['TARGET_ISA'], 'linux', 'ref')" % app) multiprocesses.append(workload.makeLiveProcess()) except: print >>sys.stderr, "Unable to find workload for %s: %s" % (buildEnv['TARGET_ISA'], app) sys.exit(1) elif options.cmd: multiprocesses, numThreads = get_processes(options) cpus = [ NetworkTest(num_memories=options.num_dirs) \ for i in xrange(options.num_cpus) ] system = System( cpu = cpus,mem_mode = 'timing',physmem = SimpleMemory()) #mapping print " mapping" if options.cmd or options.bench : for i in xrange(np): if options.smt: system.cpu[i].workload = multiprocesses elif len(multiprocesses) == 1: system.cpu[i].workload = multiprocesses[0] else: system.cpu[i].workload = multiprocesses[i] if options.fastmem: system.cpu[i].fastmem = True if options.checker: system.cpu[i].addCheckerCpu() system.cpu[i].createThreads() ############################## # Set the option for physmem so that it is not allocated any space #system.physmem.null = True #options.use_map = True Ruby.create_system(options, system) i = 0 for ruby_port in system.ruby._cpu_ruby_ports: # # Tie the cpu test ports to the ruby cpu port # cpus[i].test = ruby_port.slave ruby_port.access_phys_mem = False i += 1 print " apres ruby create " # ----------------------- # run simulation # ----------------------- root = Root( full_system = False, system = system ) print " benchmark " if options.benchmark != '': # -------------------- # Pick the correct Splash2 Benchmarks # ==================== if options.benchmark == 'Cholesky': root.workload = Cholesky() elif options.benchmark == 'FFT': root.workload = FFT() elif options.benchmark == 'LUContig': root.workload = LU_contig( ) elif options.benchmark == 'LUNoncontig': root.workload = LU_noncontig() elif options.benchmark == 'Radix': root.workload = Radix() elif options.benchmark == 'Barnes': root.workload = Barnes() elif options.benchmark == 'FMM': root.workload = FMM() elif options.benchmark == 'OceanContig': root.workload = Ocean_contig() elif options.benchmark == 'OceanNoncontig': root.workload = Ocean_noncontig() elif options.benchmark == 'Raytrace': root.workload = Raytrace() elif options.benchmark == 'WaterNSquared': root.workload = Water_nsquared() elif options.benchmark == 'WaterSpatial': root.workload = Water_spatial() else: print >> sys.stderr, """The --benchmark environment variable was set to something improper. Use Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig, OceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial""" sys.exit(1) # -------------------- # Assign the workload to the cpus # ==================== for cpu in cpus: cpu.workload = root.workload print " mapping workload cpu : " ,cpu ######################### #Simulation.run(options, root, system) m5.ticks.setGlobalFrequency('1ns') # instantiate configuration m5.instantiate() # simulate until program terminates exit_event = m5.simulate(options.maxtick) print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
