Hi all,
I run the simulator using the arm_detailed CPU model while simulating the ARM platform. However, the bellowing panic will occur sometimes: panic: Uncachable load [sn:4af0382b] PC (0xc016b5c0=>0xc016b5c4).(0=>1) (PC is different for different times, but PCs are often like 0xc016b5xx) @ cycle 611133741299620 [invoke:build/ARM/arch/generic/debugfaults.hh, line 94] The source codes of above panic are contained in the file cpu/o3/lsq_unit.hh: LSQUnit::read() { if (req->isUncacheable() && (load_idx != loadHead || !load_inst->isAtCommit())) { . Panic(.); } } The pc shows this is the instruction of Linux kernel. So are they any ideas about the reason? Thanks. Best regards, Yongbing Huang
_______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users