Hi, I have modified the access function in cache to service a miss as hit even when a particular block is not found. (This is just to collect some statistics). I initially had assumed that gem5 does not store actual data in cache and hence if a request misses at L1, if I just do "insertBlock, memcpy and satisfyCpuSideRequest" and return true so that recvTimingReq follows hit path, there ll be no error except that my simulation results (ipc, misses, hits etc) will not be correct. But when I run the same, I get this error panic: fault (unalign) detected @ PC (0x120046574=>0x120046578) When I googled for this error in one of the replies it says PC value is corrupted. If gem5 did not store any data in cache, I by my code would have modified only the timing parameter. How did this happen? If gem5 stores actual data, how do I print it? I also get this error for few other benchmarks panic: Tried to access unmapped address 0x8.
Any pointers would be of great help. -- *thanks®ards * *BISWABANDAN* http://www.cse.iitm.ac.in/~biswa/ “We might fall down, but we will never lay down. We might not be the best, but we will beat the best! We might not be at the top, but we will rise.”
_______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users