Hi,
To my understanding, separate instruction and data microTLBs are
implemented in arm model with 64 entries in default. But the shared MacroTLB
is missing.
Best regards,
Yongbing Huang
From: [email protected] [mailto:[email protected]] On
Behalf Of Amit Tara
Sent: Friday, July 05, 2013 1:49 AM
To: gem5 users mailing list ([email protected])
Subject: [gem5-users] Micro-TLB in Gem5 ARM model
Hi,
I would like to know if the Micro-TLB feature is being implemented in Gem5
ARM model ?
If yes, then are there separate Instruction and Data MicroTLBs ?
Thanks & Regards,
Amit Tara
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