Assuming the page table maps the address as cacheable it should just happen. Do you mean the line needs to be locked in the cache?
Ali On 10.07.2013 06:25, Ranga, L Udaya wrote: > Hi all, > > I need to ensure that a particular address is cached by ARM's L1/L2 cache. > > Can anyone please tell me how I can do it? > > Thanks, > > Uday > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [1] Links: ------ [1] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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