Le 17/07/2013 17:01, Jianghao a écrit :
Thanks for your clarification. So even all resource like operands/FUs
are available, the instruction still need to wait issueLat cycles
before execution, correct?
Well it's more like the FU does not become available until issueLat cycles.
Is there any structure like dispatch queue, issue queue defined in gem5?
From textbook, after renaming, instruction will wait in dispatch queue
for operands. If operands become ready, it will go to issue queue
waiting for execution. I'm not sure if gem5 will simulate the
contention in issue queue.
Well at dispatch instructions gets added in the ROB and the instruction
queue. As soon as the operands become ready the instruction can be
scheduled for execution and issue from the IQ. The function that
schedules ready instructions is actually in inst_queu_impl.hh
(sechduleReadyInsts()).
Arthur.
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