Hi all,
I'm currently implementing something on top of the O3 CPU using X86 ISA.
The problem is that MicroBranch is always predicted as not taken, even if
it turns out to be taken more than 10 times in a row.
This is caused by how 'branchTaken' is calculated. See below;
// cpu/o3/iew_impl.hh
DefaultIEW<Impl>::squashDueToBranch(DynInstPtr &inst, ThreadID tid)
{
...
toCommit->branchTaken[tid] = inst->pcState().branching();
...
}
// arch/x86/types.hh
bool
branching() const
{
return this->npc() != this->pc() + size();
}
This is correct for branch instructions (i.e. Wrip micro-op) other than
MicroBranch, as npc is not the nextPC for instructions which are actually
taken.
On the other hand, as MicroBranch does not change 'npc' but changes 'nupc',
branching will always return false for the MicroBranch.
I think this will solve the problem.
toCommit->branchTaken[tid] = inst->pcState().branching() || pcState.upc() +
1 != pcState().nupc();
Is this implementation intentional, or just a bug? If the former, then I
want to know the rationale behind that.
Thanks,
Jae-eon.
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