Really?
On Friday, December 6, 2013 6:36 PM, 马久跃 <[email protected]> wrote:
Hi everyone,
I'm working on attach a NIC (IGbE_e1000) to X86 full system, and make a dual
x86 system.
After modify FSConfig.py, everything work fine in classic memory model.
But when I switch to ruby model(MESI_CMP_Directory), gem5 crashed and report
"Invalid transition, event: Data, state: READY" for dma_cntrl0, but my NIC is
attached to dma_cntrl1. dma_cntrl0 is for IDE controller.
after add --debug-flags=EthernetAll, DMA, the debug output is as following:
---------------------------------------------------------------------------------------------------------------------------------
7589782415000: testsys.pc.eth0: IGbE: -------------- Cycle --------------
7589782415000: testsys.pc.eth0.RxDesc: Fetching descriptors head: 0 tail: 0
len: 256 cachePnt: 0 max_to_fetch: 0 descleft: 0
7589782415000: testsys.pc.eth0: RXS: No descriptors available in cache,
stopping ticking
7589782415000: testsys.pc.eth0: RXS: No descriptors available, fetching
7591043314500: testsys.pc.eth0: Wrote device register 0X2818 value 0XFE
7591043314500: testsys.pc.eth0: RXS: RDT Updated.
7591043314500: testsys.pc.eth0: RXS: RDT Fetching Descriptors!
7591043314500: testsys.pc.eth0.RxDesc: Fetching descriptors head: 0 tail: 254
len: 256 cachePnt: 0 max_to_fetch: 64 descleft: 254
7591043324500: testsys.pc.eth0.RxDesc: Fetching descriptors at 0x7f8db000
(0x7f8db000), size: 0x400
7591043324500: testsys.pc.eth0.dma: Starting DMA for addr: 0x7f8db000 size:
1024 sched: 0
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db000 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db040 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db080 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db0c0 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db100 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db140 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db180 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db1c0 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db200 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db240 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db280 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db2c0 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db300 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db340 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db380 size: 64
7591043324500: testsys.pc.eth0.dma: --Queuing DMA for addr: 0x7f8db3c0 size: 64
7591043324500: testsys.pc.eth0.dma: Trying to send ReadReq addr 0x7f8db000
7591043324500: testsys.pc.eth0.dma: -- Done
7591043324500: testsys.pc.eth0.dma: TransmitList: 15, inRetry: 0
7591043326000: testsys.pc.eth0.dma: Trying to send ReadReq addr 0x7f8db040
7591043326000: testsys.pc.eth0.dma: -- Failed, waiting for retry
7591043326000: testsys.pc.eth0.dma: TransmitList: 15, inRetry: 1
fatal: Invalid transition
testsys.ruby.dma_cntrl0 time: 15182086689 addr: [0x7f8db000, line 0x7f8db000]
event: Data state: READY
@ cycle 7591043344500
[doTransitionWorker:build/PARDX86/mem/protocol/DMA_Transitions.cc, line 103]
Memory Usage: 5160656 KBytes
---------------------------------------------------------------------------------------------------------------------------------
It seems eth0 send this DMA request to directory, but directory return the
response to dma_cntrl0 (connected to IDE).
I check protocol file MESI_CMP_directory-dir.sm, in dr_sendDMAData action, it
use
out_msg.Destination.add(map_Address_to_DMA(address));
set the destination, but map_Address_to_DMA() is just a static function which
always return 0 in MachineType.cc
186 MachineID
187 map_Address_to_DMA(const Address &addr)
188 {
189 MachineID dma = {MachineType_DMA, 0};
190 return dma;
191 }
Is this a Ruby's BUG, or I miss something?
Thanks.
Best Regards, Jiuyue
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