Hi everyone, My research team try to use gem5 simulator for evaluation of a new L1 hybrid data on-chip memory which consists of a scratch pad memory and normal cache. We just put gem5 into research recently and don't have much experience on it. I'm pretty sure it is possible to make it work on syscall mode and just want to estimate how much work we will involve in. I am looking forward to some advice. Thanks! _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
