Hi Neha,

For this thread, and all other threads where people want to evaluate
various memory types for the L2, L3, LLC, my pragmatic suggestion would be
to start by getting this patch ready to go out:

http://reviews.gem5.org/r/1809/

Once that is in place, the cache captures different read and write
latencies, and models the contention and waiting time for the banks. I
would argue that for most cases this is probably a sufficient model for
the performance impact (but I¹d be keen to hear if anyone disagrees).

The next step would be to add sufficient stats to capture how many
reads/writes and how long time is spent in various states (idle, refresh
etc), and use these stats for a high-level power model.

At this point, I do not see how adding more detailed memory models would
help. Could someone elaborate on why they think this is a good idea?

Thanks,

Andreas


On 09/04/2014 01:47, "Neha Kharwadkar" <kharwadkar.n...@gmail.com> wrote:

>Hi!
>I am mediocre user of gem5.
>I am implementing following different configurations in gem5
>L1 cache              L2 cache
>SRAM                   SRAM
>SRAM                   DRAM
>SRAM                   MRAM
>SRAM                  STT-RAM
>SRAM                   PRAM
>
>The aim of this implementation is to find out power efficient and
>performance wise best cache configuration. I know tools like NVsim and
>NVmain with which we can implement this. But any idea how can we start
>with
>this in gem5?
>A detail reply would be appreciated.
>
>_______________________________________________
>gem5-users mailing list
>gem5-users@gem5.org
>http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>


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