Thanks Neal, I'll take that into account and change everything to 8 cores max and see if it will work, for now.
On Tue, Apr 29, 2014 at 10:07 PM, Neal Haas <[email protected]> wrote: > The GIC in the gem5 source cannot support more than 8 CPUs. You would need > GICv3 which has not yet been implemented. At least, that's what I think. > > > On Tue, Apr 29, 2014 at 1:34 PM, Embedded Systems MadHatter < > [email protected]> wrote: > >> Hello, >> >> I'm trying to run a 12 cores ARM simulation, following are my >> parameters, I had a segmentation fault at a Linux initially, but I changed >> the kernel in >> drivers/irqchip/irq-gic.c >> and change the parameter >> >> #define NR_GIC_CPU_IF 8 >> >> to >> >> #define NR_GIC_CPU_IF 32 >> >> because I was having a BUG assertion due to its limitation (I believe, so >> that is why I made the change). >> >> >> After recompiling and regenerating DTS, added additional CPUs as >> recommended in the documentation. >> >> Please someone could point the cause of the error and provide insights on >> how to directions to fix it. >> >> error: >> >> >> command line: ./build/ARM/gem5.fast configs/mine/fs.py >> --disk-image=/opt/arm/gem5/armv8_system/disks/linaro-minimal-armv8.img >> --kernel=/opt/arm/gem5/armv8_system/binaries/vmlinux-mine-aarch64-vexpress-emm64 >> --dtb-filename=/opt/vlsi/arm/gem5/armv8_system/binaries/rtsm_ve-aemv8a-mine.dtb >> --machine-type=VExpress_EMM64 --caches --l2cache --l1d_size=32kB >> --l1i_size=32kB --l2_size=256kB --l3_size=20MB --l1d_assoc=4 --l1i_assoc=4 >> --l2_assoc=8 --l3_assoc=16 --cacheline_size=64 -n 12 --sys-clock=2.0GHz >> --cpu-clock=2.0GHz --mem-type=DDR3_1600_x64 >> Global frequency set at 1000000000000 ticks per second >> info: kernel located at: >> /opt/arm/gem5/armv8_system/binaries/vmlinux-mine-aarch64-vexpress-emm64 >> warn: Highest ARM exception-level set to AArch32 but bootloader is for >> AArch64. Assuming you wanted these to match. >> Listening for system connection on port 5901 >> Listening for system connection on port 3456 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7000 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7001 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7002 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7003 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7004 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7005 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7006 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7007 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7008 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7009 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7010 >> 0: system.remote_gdb.listener: listening for remote gdb on port 7011 >> info: Using bootloader at address 0x10 >> info: Using kernel entry physical address at 0x80080040 >> info: Loading DTB file: >> /opt/arm/gem5/armv8_system/binaries/rtsm_ve-aemv8a-mine.dtb at address >> 0x88000000 >> **** REAL SIMULATION **** >> info: Entering event queue @ 0. Starting simulation... >> warn: SCReg: Writing 0 to dcc0:site0:pos0:fn7:dev0 >> panic: event not found! >> @ tick 56582624 >> [remove:build/ARM/sim/eventq.cc, line 195] >> Memory Usage: 56582624 KBytes >> Program aborted at cycle 826043850000 >> Aborted (core dumped) >> >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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