Hi, That can happen.. But why is the behavior you describe not acceptable? if another structure is added, then incoming snoops have to CAM into that structure too and hardware implementation wise, may be not efficient.
Thanks Srini On 05/05/14, Adrián Colaso Diego via gem5-users wrote: > Hi, > > I've noticed than when you run gem5 using X86 iSA there is a huge > bottleneck in SQ due to TSO implementation as only one store is allowed > to be in flight. As a consequence old stores that are waiting to access > memory and that aren't present in ROB saturate SQ structure. > > I think that these old stores should be inserted in another structure > not to saturate SQ as what i see in results files is that cpu is stalled > half of simulation cause SQ is full. > > Has anybody experimented what i describe? > > Thanks, > Adrian. > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
