Hi Geeta,
This has been discussed quite a few times, so I’d suggest you do a search on
the archive.
In short, there are a number of reasons this happens, and without knowing more
about your use-case (full system or not, etc), I would guess the reason is
simply differences in acquiring/releasing locks.
Andreas
From: Geeta Patil via gem5-users
<[email protected]<mailto:[email protected]>>
Reply-To: Geeta Patil
<[email protected]<mailto:[email protected]>>,
gem5 users mailing list <[email protected]<mailto:[email protected]>>
Date: Tuesday, 10 June 2014 06:24
To: "[email protected]<mailto:[email protected]>"
<[email protected]<mailto:[email protected]>>
Subject: [gem5-users] Cache Coherency Statistic Output
Hi All,
I have executed barens(splash2 benchmark program) using MI and MESI protocol.
I am finding number of instructions simulated. When I checked the statistic
file, number of instructions simulated using MI protocol are 12184940560 and
number of instructions simulated using MI protocol are 12174567882.
I am not able to understand when I am executing same program why is there
difference of 10372678 between number of instructions simulated.
I want to understand why there is difference.
Can any body help me.
Thank You,
Geeta
-- IMPORTANT NOTICE: The contents of this email and any attachments are
confidential and may also be privileged. If you are not the intended recipient,
please notify the sender immediately and do not disclose the contents to any
other person, use it for any purpose, or store or copy the information in any
medium. Thank you.
ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered
in England & Wales, Company No: 2557590
ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ,
Registered in England & Wales, Company No: 2548782
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
