Hi all, there seems to have been some confusion around the functionality provided in our recent gem5 DVFS patch. The patch adds the concept of having multiple voltages and frequencies per voltage / clock domain and offers gem5-internal interfaces to change those (via DVFSHandler::perfLevel(<domain_id>, <perf_level>). These interfaces can, for example, be used to perform DVFS control in hardware with an own DVFS-control widget.
The mechanism for controlling the DVFS points from within simulation through the standard software layers are highly OS, platform and architecture specific. We are currently getting a patch ready that creates the proper interface between the DVFSHandler and Linux' cpufreq world for ARM. I hope that clarifies the scope of this patch. -- Sincerely, Stephan Stephan Diestelhorst Staff Engineer, ARM R&D Systems +44 (0)1223 405662 -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
