Hi Emilio, I am using X86_MESI_Two_Level for full system simulation of lu_cb (spalsh2 ) with 4 cores.
Gem5/build/X86_MESI_Two_Level/gem5.fast --stats-file=stats_test.txt Gem5/configs/example/fs.py -n 4 --cpu-type=detailed --fast-forward=100000000 --caches --l1d_size="64kB" --l1i_size="32kB" --l2cache --num-l2caches=4 --l2_size="2MB" --cacheline_size=64 --num-dirs=4 --ruby --topology=Mesh --mesh-rows=2 --garnet-network=flexible --kernel=/gem5_images/x86_system/binaries/vmlinux --disk-image=/gem5_images/x86_system/disks/linux-x86.img --script=lu_cb_4c_simsmall.rcS Cheers, Parisa On Thu, Aug 14, 2014 at 3:38 AM, Castillo Villar, Emilio < [email protected]> wrote: > Can you specify the cmdline and protocol that you are using? > > > Enviado desde mi iPad > > El 14/08/2014, a las 00:34, "parisa khadem hamedani via gem5-users" < > [email protected]> escribió: > > Hello, > > In Ruby, L1 and L2 caches are employing the Ruby clock. However I need > the L1 cache uses the cpu clock. Therefore, I used the following patch to > set the L1 controllers and the Sequencer clock domain to cpu_clk_domain. > Patch : ruby: Fixes clock domains in configuration files > http://reviews.gem5.org/r/2218/diff/2/#index_header > > When I used this patch, Gem5 crashed at the beginning because of Possible > Deadlock detected. Do I need to change something else, which is not > included in this patch? > > I would appreciated if you help me to solve this problem. > > Thank you, > Parisa > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > >
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