Hi, The reason your kernel doesn't bring up more than four cores is because the dtb file you're using (assuming it's the upstream one) only lists four CPUs. For ARM systems, Linux relies on the dtb file to discover resources on buses that don't support enumeration. For gem5, that means pretty much anything that isn't connected the simulated PCI bus.
There are two solutions here, either you patch up the DTB file manually or you download and compile a new kernel from the gem5 kernel repository [1]. I'm not going to describe how to cross compile a Linux kernel, there should be plenty of tutorials online. To patch the DTB, install the dtc tool. If you're on an Ubuntu/Debian machine, just install the device-tree-compiler package. The source code for the tool can be downloaded from this git repo [1]. To decode a dtb file into a dts (device tree source) file do the following: dtc -Odts -Idtb < input.dtb > output.dts Open the output file and look for the CPU nodes (cpu@0-cpu@3) in the file. Add new nodes for each CPU 4 through 7 and make sure to update the name of the node and the "reg" property. I had a quick look at the file and it seems like it contains an incorrect timer entry (there is a property incorrectly overriding the frequency of the generic timer) that you probably want to fix as well. Look for a node named "timer" with the compatible property set to "arm,armv8-timer". Remove the "clock-frequency" property from this node. Compile the file again using: dtc -Odtb -Idts < source.dts > new.dtb //Andreas [1] https://git.kernel.org/cgit/utils/dtc/dtc.git [2] http://linux-arm.org/git?p=linux-aarch64-gem5.git;a=summary On 02/23/2015 05:27 PM, Nimish Girdhar via gem5-users wrote:
I also am stuck with the same problem :( Has anybody worked on arm full system with more than 4 cores? Any help will be appreciated. On Fri, Jan 30, 2015 at 6:31 PM, Zehan Cui via gem5-users <[email protected] <mailto:[email protected]>> wrote: not yet, I'm using 4 cores now On Sat, Jan 31, 2015 at 4:04 AM, Jianghao <[email protected] <mailto:[email protected]>> wrote: Have you solved the problem? I'm in a similar situation.. On 1/28/2015 10:20 PM, Zehan Cui via gem5-users wrote:Thanks. I do have 8 cores in my config.ini file. The dtb file is downloaded from the gem5 website. But I cannot directly read it, so how can I check this? Zehan On Thu, Jan 29, 2015 at 3:29 AM, Lokesh Jindal <[email protected] <mailto:[email protected]>> wrote: My first approach for debug would be this: -n 8 => this configures gem5 system model to have 8 cores => you should see 8 cores in your config.ini file in output directory! Everything should be as expected till this point! However, the kernel needs to support as well as be aware of 8 core configuration => Check if your dtb file (vexpress.aarch64.20140821.dtb) corresponds to 4 core configuration! => This is easy to check if you have either proper documentation or the source dts file that was used to generate this dtb file. Otherwise, I am not sure how you can check that. On 01/27/15 23:39, Zehan Cui via gem5-users wrote:Hello everyone, I have download the latest aarch64 binary and disk image from this link (http://www.gem5.org/dist/current/arm/aarch-system-2014-10.tar.xz). The command line I'm using is: build/ARM/gem5.fast configs/example/fs.py --kernel=vmlinux.aarch64.20140821 --disk-image=aarch64-ubuntu-trusty-headless.img --dtb-filename=vexpress.aarch64.20140821.dtb --machine-type=VExpress_EMM64 --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=256kB --l3_size=16MB -n 8 However, I can only see four cores: [ 0.000000] Virtual kernel memory layout: [ 0.000000] vmalloc : 0xffffff8000000000 - 0xffffffbbffff0000 (245759 MB) [ 0.000000] vmemmap : 0xffffffbc01c00000 - 0xffffffbc02300000 ( 7 MB) [ 0.000000] modules : 0xffffffbffc000000 - 0xffffffc000000000 ( 64 MB) [ 0.000000] memory : 0xffffffc000000000 - 0xffffffc020000000 ( 512 MB) [ 0.000000] .init : 0xffffffc000692000 - 0xffffffc0006c6200 ( 209 kB) [ 0.000000] .text : 0xffffffc000080000 - 0xffffffc0006914e4 ( 6214 kB) [ 0.000000] .data : 0xffffffc0006c7000 - 0xffffffc0007141e0 ( 309 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 [ 0.000000] NR_IRQS:64 nr_irqs:64 0 [ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys). [ 0.000002] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns [ 0.000068] Console: colour dummy device 80x25 [ 0.000072] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480) [ 0.000076] pid_max: default: 32768 minimum: 301 [ 0.000110] Mount-cache hash table entries: 1024 (order: 1, 8192 bytes) [ 0.000114] Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes) [ 0.000402] hw perfevents: no hardware support available [ 0.060098] CPU1: Booted secondary processor [ 0.080101] CPU2: Booted secondary processor [ 0.100108] CPU3: Booted secondary processor [ 0.100130] Brought up 4 CPUs [ 0.100138] SMP: Total of 4 processors activated. Does anyone know how to bring up 8 cores? Thanks, Zehan _______________________________________________ gem5-users mailing list [email protected] <mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users_______________________________________________ gem5-users mailing list [email protected] <mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users_______________________________________________ gem5-users mailing list [email protected] <mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users -- Warm regards Nimish Girdhar Department of Electrical and Computer Engineering Texas A&M University
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