Zehan,
  is your application in simulation making any progress?  If not then you might 
miss an update from someone handshaking with this core.  It seems the memory 
location is set to a non-zero value and then this core will wake up.

It might be that the core setting this memory location never runs, or the store 
gets lost in the process.

You may want to understand
(1) which address is this core reading from
(2) did some other core execute a write to this location

You could then dig deeper into why things are disappearing.

Also, if this is system boot, the core might wait for a while until it is woken 
up by the boot CPU.  You probably do not wan to boot the kernel in detailed CPU 
models.

Thanks,
  Stephan

On 20.01.2015 2:14, "Zehan Cui via gem5-users" 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org>> wrote:

Hi all,

I run a multi-threaded application in full system mode with detailed cpu model. 
I extract the instruction traces of each cpu, and find that the last cpu keeps 
executing instructions like the following for at least 1 billion instructions 
(The max_instructions is set to 1 billion).

8007580397289: system.switch_cpus_17 T0 : @flush_tlb_others+133    :   NOP      
                : IntAlu :
8007580397289: system.switch_cpus_17 T0 : @flush_tlb_others+135    : cmp    
DS:[rbp], 0
8007580397289: system.switch_cpus_17 T0 : @flush_tlb_others+139    : jnz    
0xfffffffffffffff8
8007580397602: system.switch_cpus_17 T0 : @flush_tlb_others+133    :   NOP      
                : IntAlu :
8007580397602: system.switch_cpus_17 T0 : @flush_tlb_others+135    : cmp    
DS:[rbp], 0
8007580397602: system.switch_cpus_17 T0 : @flush_tlb_others+139    : jnz    
0xfffffffffffffff8
8007580397915: system.switch_cpus_17 T0 : @flush_tlb_others+133    :   NOP      
                : IntAlu :
8007580397915: system.switch_cpus_17 T0 : @flush_tlb_others+135    : cmp    
DS:[rbp], 0
8007580397915: system.switch_cpus_17 T0 : @flush_tlb_others+139    : jnz    
0xfffffffffffffff8
8007580398228: system.switch_cpus_17 T0 : @flush_tlb_others+133    :   NOP      
                : IntAlu :


I run the application with atomic cpu model. The same instruction sequence 
appears for a while, but soon switches to the instructions of the application.

Such problem has bothered me for a while. Does anyone understand this?

thanks,
zehan

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