Lyn, You are right about the length of the instructions as defined by the ISAs. However, within gem5 we use a few extra bits in the upper 32 bits to indicate what ISA mode we’re in, i.e. v7, Thumb, v8, etc. since it is possible to switch between them.
Curtis From: gem5-users [mailto:[email protected]] On Behalf Of liyinnan Sent: Wednesday, June 24, 2015 8:21 PM To: gem5-users Subject: [gem5-users] Arm Instruction length in Gem5 Hi all, I am adding some instructions to the ARM ISA in Gem5 and I found that the data pass to the ARM decoder function is 64 bit long, my understanding is that both AARCH64 and AARCH32 instructions are 32 bit long, so dose anyone know where and why Gem5 increase the instruction length? Thanks, Lyn -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
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