Hello all,
I am looking for a dual port connection for a DRAM memory. It is commented on
lines 73 and 74 in src/mem/DRAMCtrl.py file the following:
# single-ported on the system interface side, instantiate with a
# bus in front of the controller for multiple ports
How can this be done? I mean, I want to execute a simultaneous read write
operation.
Best regards,
--
Marcos Horro Varela,
BSc student
University of A Coruña
+34 618 62 67 37
http://markos-horro.com
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