Polydoros Petrakis <polpetras <at> gmail.com> writes: > > > Maybe you can check the physical memory range allocated for each process and track requests depending on the access address. (Check which range it belongs to) > > > On 31 March 2015 at 00:30, Prathap Kolakkampadath <kvprathap <at> gmail.com> wrote: > > > > > Hello Andreas, > I am trying to collect the per request memory access latency of a specific linux process Read requests. I am running two memory intensive linux processes in a single core. > In my understanding, the Thread id/Context id, Master id are the same for the two process memory requests running in the same core. So I won't be able to differentiate the requests of one process from the other using that. Is it possible to differentiate the memory requests at DRAM Controller layer based on linux process id? > > > Thanks, > Prathap > > > > > > On Mon, Mar 30, 2015 at 12:35 PM, Andreas Hansson <Andreas.Hansson <at> arm.com> wrote: > > > > > > > > Hi Prathap, > > Could you be a bit more specific about what you mean by “tracking requests”. Each request that originates in the CPU has an ASID and ThreadID associated with it, as well as a MasterID. You should be able to access these at the DRAM controller if that’s > what you’re after. Note that you end up getting requests without this information (write backs etc), so you cannot always rely on it. > > Andreas > > > > From: Prathap Kolakkampadath <kvprathap <at> gmail.com>Reply-To: gem5 users mailing list <gem5-users <at> gem5.org>Date: Monday, 30 March 2015 17:27To: gem5 users mailing list <gem5-users <at> gem5.org>Subject: [gem5-users] Tracking DRAM requests from a process > > > > > > > > > > Hello Users, > > I am running Gem5 on ARM FS mode using classic memory system. I am running two process on a single core. I need to track the DRAM requests (memory access latency) of a particular process. Is it possible to identify the process id of a linux process in the DRAM > Controller layer? > > > > > Thanks, > > Prathap Kumar Valsan > > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents > to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 > > > > _______________________________________________ > gem5-users mailing listgem5-users <at> gem5.orghttp://m5sim.org/cgi- bin/mailman/listinfo/gem5-users > > > > > _______________________________________________ > gem5-users mailing listgem5-users <at> gem5.orghttp://m5sim.org/cgi- bin/mailman/listinfo/gem5-users > > > > > > > _______________________________________________ > gem5-users mailing list > gem5-users <at> gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Hi Did you find a way to know the core where the memory request originated? If I use function to get threadId or asid, I get following error: gem5.opt: build/ARM/mem/request.hh:533: int Request::getAsid() const: Assertion `privateFlags.isSet(VALID_VADDR)' failed. And for masterId, the number changes with simulation (I think it is generated statically). _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
