Hi Hamed, If you change the py files in src you need to recompile gem5 before running. You do not need the debug flag to get the trace.
Hope that helps. Andreas From: gem5-users <[email protected]<mailto:[email protected]>> on behalf of Hamed Ghadimi <[email protected]<mailto:[email protected]>> Reply-To: Hamed Ghadimi <[email protected]<mailto:[email protected]>>, gem5 users mailing list <[email protected]<mailto:[email protected]>> Date: Thursday, 13 August 2015 07:04 To: "[email protected]<mailto:[email protected]>" <[email protected]<mailto:[email protected]>> Subject: [gem5-users] CPU and L1-d Cache Trace Hi, I want to add the CommMonitor between CPU and L1d-cache in SE mode to trace all the memory operation requests in the system. I added following lines in the /src/cpu/BaseCPU.py file: cpu.monitor = CommMonitor(trace_file='cpu.ptrc',trace_enable=True) cpu.dcache_port = cpu.monitor.slave cpu.monitor.master = cache.cpu_side Then I run: ./build/ALPHA/gem5.opt --debug-flags=CommMonitor configs/example/se.py -c tests/test-progs/hello/bin/alpha/linux/hello The code executes but the trace file does not get generated. The CommMonitor also does not get recorded in config.ini. How to generate this trace? Best Regards, Hamed -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
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