>From your command it's pretty clear that CPU 1 isnt getting directed to the proper start address for the program, but CPU 1 is.
cpu0.execute: Waking up Fetch (via Execute) by issuing a branch: (0x400190=>0x400198).(0=>1) cpu1.execute: Waking up Fetch (via Execute) by issuing a branch: (0=>0x8).(0=>1) I believe for multi-core runs in SE you have to specify a command per-cpu (separated by semi-colons). It's been a long time since I've used the public gem5 config scripts, but... *-c "tests/test-progs/hello/bin/x86/linux/hello;**tests/test-progs/hello/bin/x86/linux/hello". * Is likely needed, the 2nd cpu wasn't given a command and likely got assigned a null process. On Fri, Oct 9, 2015 at 10:29 AM, Amirali Boroumand < [email protected]> wrote: > Hi Andreas, > > Thanks for your reply. I don't think it has anything to do with the kernel > version. It doesn't even work on SE mode for ARM/X86. I tried using > MinorCPU in a multicore configuration on the development repository, and it > worked, both on ARM and X86. However, it doesn't work on the latest stable > repo. The problem is that the second core reads an invalid PC, and this > happens both in ARM and X86. Here is part of the output for X86: > > ********************** > > *command line: build/X86/gem5.opt > --debug-flags=SimpleCPU,Ruby,Minor,SimpleTrace,ExecEnable > configs/example/se.py --cpu-type=minor --num-cpus=2 -c > tests/test-progs/hello/bin/x86/linux/hello --caches --l2cache* > > > *Global frequency set at 1000000000000 ticks per second* > > *warn: DRAM device capacity (8192 Mbytes) does not match the address range > assigned (512 Mbytes)* > > *0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000* > > *0: system.remote_gdb.listener: listening for remote gdb #1 on port 7001* > > * 0: system.cpu0: ActivateContext thread: 0 0: > system.cpu0.execute: Waking up Fetch (via Execute) by issuing a branch: > (0=>0x8).(0=>1)* > > ***** REAL SIMULATION ***** > > * 0: system.cpu0: MinorCPU startup* > > * 0: system.cpu0: ActivateContext thread: 0 0: > system.cpu0.execute: Waking up Fetch (via Execute) by issuing a branch: > (0x400190=>0x400198).(0=>1)* > > * 0: system.cpu1: MinorCPU startup* > > * 0: system.cpu1: ActivateContext thread: 0 0: system.cpu1: > ActivateContext thread: 0 0: system.cpu1.execute: Waking up Fetch (via > Execute) by issuing a branch: (0=>0x8).(0=>1)* > > * 0: system.cpu1.execute: Waking up Fetch (via Execute) by issuing a > branch: (0=>0x8).(0=>1)* > > *info: Entering event queue @ 0. Starting simulation...* > > * 500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 500: system.cpu1.execute: Execute skipping a cycle to allow old > branch to complete* > > * 500: system.cpu0.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 500: system.cpu0.execute: Execute skipping a cycle to allow old > branch to complete* > > * 1000: system.cpu0.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 1000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 1500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 1500: system.cpu0.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 2000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 2500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 2500: system.cpu1.execute: Trying to issue inst: 0/3.1/1/1.1 pc: 0x0 > (fault: "Page-Fault") to FU: 0* > > * 2500: system.cpu1.execute: Issuing inst: 0/3.1/1/1.1 pc: 0x0 (fault: > "Page-Fault") into FU 0* > > * 2500: system.cpu1.execute: Stepping to next inst inputIndex: 1* > > * 2500: system.cpu1.execute: Stepping to next inst inputIndex: 2* > > * 2500: system.cpu1.execute: Wrapping* > > * 2500: system.cpu1.execute.lsq: No matching memory response for inst: > 0/3.1/1/1.1 pc: 0x0 (fault: "Page-Fault")* > > * 3000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 3000: system.cpu1.execute: Trying to commit canCommitInsts: 1* > > * 3000: system.cpu1.execute: Trying to commit from FUs* > > * 3000: system.cpu1.execute.lsq: No matching memory response for inst: > 0/3.1/1/1.1 pc: 0x0 (fault: "Page-Fault")* > > * 3500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 3500: system.cpu1.execute: Trying to commit canCommitInsts: 1* > > * 3500: system.cpu1.execute: Trying to commit from FUs* > > * 4000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 4000: system.cpu1.execute: Trying to commit canCommitInsts: 1* > > * 4000: system.cpu1.execute: Trying to commit from FUs* > > * 4000: global: ExecContext setting PC: (0=>0x8).(0=>1)* > > * 4000: system.cpu1.execute: Fault inst reached Execute: Page-Fault* > > *panic: Tried to execute unmapped address 0.* > > ******************* > > and here is the output for ARM: > > ***************** > > *command line: build/ARM/gem5.opt > --debug-flags=SimpleCPU,Ruby,Minor,SimpleTrace,ExecEnable > configs/example/se.py --cpu-type=minor --num-cpus=2 -c > tests/test-progs/hello/bin/arm/linux/hello --caches --l2cache* > > > *Global frequency set at 1000000000000 ticks per second* > > *warn: DRAM device capacity (8192 Mbytes) does not match the address range > assigned (512 Mbytes)* > > *0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000* > > *0: system.remote_gdb.listener: listening for remote gdb #1 on port 7001* > > * 0: system.cpu0: ActivateContext thread: 0 0: > system.cpu0.execute: Waking up Fetch (via Execute) by issuing a branch: > (0=>0x4).(0=>1)* > > ***** REAL SIMULATION ***** > > * 0: system.cpu0: MinorCPU startup* > > * 0: system.cpu0: ActivateContext thread: 0 0: > system.cpu0.execute: Waking up Fetch (via Execute) by issuing a branch: > (0x8150=>0x8154).(0=>1)* > > * 0: system.cpu1: MinorCPU startup* > > * 0: system.cpu1: ActivateContext thread: 0 0: system.cpu1: > ActivateContext thread: 0 0: system.cpu1.execute: Waking up Fetch (via > Execute) by issuing a branch: (0=>0x4).(0=>1)* > > * 0: system.cpu1.execute: Waking up Fetch (via Execute) by issuing a > branch: (0=>0x4).(0=>1)* > > *info: Entering event queue @ 0. Starting simulation...* > > * 500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 500: system.cpu1.execute: Execute skipping a cycle to allow old > branch to complete* > > * 500: system.cpu0.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 500: system.cpu0.execute: Execute skipping a cycle to allow old > branch to complete* > > * 1000: system.cpu0.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 1000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 1500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 1500: system.cpu0.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 2000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 2500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 2500: system.cpu1.execute: Trying to issue inst: 0/3.1/1/1.1 pc: 0x0 > (fault: "Generic page table fault") to FU: 0* > > * 2500: system.cpu1.execute: Issuing inst: 0/3.1/1/1.1 pc: 0x0 (fault: > "Generic page table fault") into FU 0* > > * 2500: system.cpu1.execute: Stepping to next inst inputIndex: 1* > > * 2500: system.cpu1.execute: Stepping to next inst inputIndex: 2* > > * 2500: system.cpu1.execute: Wrapping* > > * 2500: system.cpu1.execute.lsq: No matching memory response for inst: > 0/3.1/1/1.1 pc: 0x0 (fault: "Generic page table fault")* > > * 3000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 3000: system.cpu1.execute: Trying to commit canCommitInsts: 1* > > * 3000: system.cpu1.execute: Trying to commit from FUs* > > * 3000: system.cpu1.execute.lsq: No matching memory response for inst: > 0/3.1/1/1.1 pc: 0x0 (fault: "Generic page table fault")* > > * 3500: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 3500: system.cpu1.execute: Trying to commit canCommitInsts: 1* > > * 3500: system.cpu1.execute: Trying to commit from FUs* > > * 4000: system.cpu1.execute.lsq.storeBuffer: StoreBuffer step > numUnissuedAccesses: 0* > > * 4000: system.cpu1.execute: Trying to commit canCommitInsts: 1* > > * 4000: system.cpu1.execute: Trying to commit from FUs* > > * 4000: global: ExecContext setting PC: (0=>0x4).(0=>1)* > > * 4000: system.cpu1.execute: Fault inst reached Execute: Generic page > table fault* > > *panic: Page table fault when accessing virtual address 0* > > ***************** > > So, my question is that, since the development repo version works > smoothly, has someone made any fix to MinorCPU in the latest stable repo? I > tried to find it but I didn't come across any related patch. > > Thanks! > > On Fri, Oct 9, 2015 at 8:55 AM, Andreas Hansson <[email protected]> > wrote: > >> Hi Amirali, >> >> Just to be clear, the MinorCPU supports multicore just fine. We even use >> it for heterogeneous multi-core configs (big and little cores). You may >> want to try a more recent kernel. For ARM, anything up till 4.3 works. >> There are instructions on the wiki for how to build a more recent kernel ( >> http://www.gem5.org/ARM_Linux_Kernel). >> >> I hope that helps. >> >> Andreas >> >> From: gem5-users <[email protected]> on behalf of Amirali >> Boroumand <[email protected]> >> Reply-To: gem5 users mailing list <[email protected]> >> Date: Thursday, 8 October 2015 at 22:43 >> To: gem5 users mailing list <[email protected]> >> Subject: Re: [gem5-users] Minor CPU in X86 >> >> I solved the issue. The MinorCPU should be added to CPU_MODELS in the >> *build_opts/X86. >> *Now the problem is that the simulation crashes when I run multicores. >> Seems like MinorCPU doesn't support multicore. It keeps generating >> following error: >> >> * command line: build/X86/gem5.opt --debug-flags=MinorCPU -d result2/ >> configs/example/fs.py --cpu-type=minor --num-cpus=2 >> --kernel=/home/amirali/gem5/binaries/x86_64-vmlinux-2.6.32-smp >> --disk-image=/home/amirali/gem5/disks/linux_x86_16GB_2 --caches --ruby* >> >> *Global frequency set at 1000000000000 ticks per second* >> >> *warn: DRAM device capacity (8192 Mbytes) does not match the address >> range assigned (512 Mbytes)* >> >> *info: kernel located at: >> /home/amirali/gem5/binaries/x86_64-vmlinux-2.6.32-smp* >> >> *Listening for com_1 connection on port 3456* >> >> * 0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012* >> >> *0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000* >> >> *0: system.remote_gdb.listener: listening for remote gdb #1 on port 7001* >> >> *warn: Reading current count from inactive timer.* >> >> * 0: system.cpu0: ActivateContext thread: 0 0: system.cpu1: >> SuspendContext 0* >> >> ***** REAL SIMULATION ***** >> >> * 0: system.cpu0: MinorCPU startup* >> >> * 0: system.cpu0: ActivateContext thread: 0 0: system.cpu1: >> MinorCPU startup* >> >> * 0: system.cpu1: ActivateContext thread: 0 0: system.cpu1: >> ActivateContext thread: 0info: Entering event queue @ 0. Starting >> simulation...* >> >> *panic: invalid access size(?) for PCI configspace!* >> >> * @ tick 83500* >> >> *[read:build/X86/dev/pciconfigall.cc, line 72]* >> >> *Memory Usage: 814808 KBytes* >> >> *Program aborted at cycle 83500* >> >> >> Any help would be appreciated! >> >> On Thu, Oct 8, 2015 at 4:00 PM, Amirali Boroumand < >> [email protected]> wrote: >> >>> Hi, >>> >>> I'd like to use Minor CPU type for X86 system, but it seems that it is >>> only supported in ARM and Alpha. Is there anyway I could use Minor CPU type >>> for X86 System? >>> >>> Thanks! >>> >>> Best, >>> Amirali >>> >>> -- >>> -- >>> Amirali Boroumand >>> PhD Student >>> Carnegie Mellon University >>> >> >> >> >> -- >> -- >> Amirali Boroumand >> PhD Student >> Carnegie Mellon University >> >> ------------------------------ >> >> -- IMPORTANT NOTICE: The contents of this email and any attachments are >> confidential and may also be privileged. If you are not the intended >> recipient, please notify the sender immediately and do not disclose the >> contents to any other person, use it for any purpose, or store or copy the >> information in any medium. Thank you. >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > > -- > -- > Amirali Boroumand > PhD Student > Carnegie Mellon University > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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