Hi Abhishek, Yes, gem5 simulates the TLB and table walker. Just make sure you run full system. The miss latency depends on your configuration of the memory system, and where the data is located (L2, L3, DRAM etc).
Andreas From: gem5-users <[email protected]<mailto:[email protected]>> on behalf of Abhishek Rajgadia <[email protected]<mailto:[email protected]>> Reply-To: gem5 users mailing list <[email protected]<mailto:[email protected]>> Date: Thursday, 21 April 2016 at 11:37 To: gem5 users mailing list <[email protected]<mailto:[email protected]>> Subject: [gem5-users] TLB miss delay in gem5 Dear All, Does gem5 simulate TLB miss and page table walk for ARM ISA? how much is the TLB miss delay? -- Regards, Abhishek Rajgadia Electrical Engineering, IIT Bombay IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
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