Hi all I'm trying to build a fault tolerant multi-core system basing on ARM ... So, i wonder if it's possible to use ECC or even parity bits for Error detection or/and correction within the memories and caches ... if yes, how can i enable it and what are the source files if it's possible?
Thank you -- *Anouar NECHI* *IT Engineer : Industrial systemsHigher Institute of Computer ScienceTunis - El Manar University* *Phone :* *(+216) 50 311 536 <%28%2B216%29%2050%20311%20536>* *E-mail :* *[email protected] <[email protected]>*
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