Hello Monir, You're correct that in SE mode the TLB is never accessed. You'll have to use FS mode if you want to use a TLB model.
If you want to dump periodic stats, you can use a method similar to how the Simulation.py script takes periodic checkpoints. You can put "m5.simulate(period)" in a loop and call m5.stats.dump() and m5.stats.reset() after each simulation period. Overall, the support for SPARC in gem5 is not as robust as the support for x86 and ARM. I don't know how well full-system is support for SPARC. SPEC should work for x86 and ARM in FS mode. Jason On Tue, Jul 19, 2016 at 11:38 AM Zaman, Monir <[email protected]> wrote: > Hello All, > I am new to GEM5. Currently able to run SPEC benchmark in the SE mode with > Detailed CPU. I ran the bzip2 with “test” input which took around 18 hours > to complete. > > I am running the SPARC-Linux SE mode. Now, I wanted to get the stats to > pass onto McPAT for power numbers, but in the config.ini file, I see the > “system.cpu.dtb” and “system.cpu.itb” for DTLB and ITLB respectively, but > there is nothing in the stats.txt file. I am looking for TLB Access, TLB > Misses information to put into the “Niagara1.xml” in McPAT. > > The command I used to run: > > gem5/gem5-stable/build/SPARC/gem5.perf --outdir=test_bzip2_output > gem5/gem5-stable/configs/example/spec06_config.py -n 1 --cpu-type=detailed > --caches --l1d_size=8kB --l1i_size=16kB --l2cache --l2_size=3MB > --l2_assoc=12 --cpu-clock=1.2GHz --sys-voltage=1.2V --benchmark=bzip2 > --benchmark_stdout=test_bzip2_output/bzip2.out > --benchmark_stderr=test_bzip2_output/bzip2.err > > I don’t know how to configure the TLB info in the Command line using > different flags/switches (just like the —l1d_size or —l1i_size etc). > Below is the config.ini files: > > 47 [system.cpu] > > 48 type=DerivO3CPU > > 49 children=branchPred dcache dtb fuPool icache interrupts isa itb > tracer workload > > 50 LFSTSize=1024 > > 51 LQEntries=32 > > 75 dtb=system.cpu.dtb > > > [system.cpu.dtb] > > 188 type=SparcTLB > > 189 eventq_index=0 > > 190 size=64 > > Is there any TLB support in the SE mode? I do see the “SparcTLB” in the > config file, so if there is any modification I need to do to get TLB info, > that would be great to know. > > On a separate note, how can I generate the stats.txt file for every 10 > simulated seconds of the workload in SE mode? > > I searched and saw some attempt of running the FS mode for SPARC T1, but > didn’t see any successful ones. Is it possible to do (with reasonable > effort)? > > /Monir > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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