Hi all I am currently running an application on 64 core ARMv8 FS with Classic Memory with individual L1 D and I Cache and unified L2 cache.
On looking at the cache memory trace, two virtual addresses, one from Kernel space (e.g. 0xffffffc071a63400) and one from application space (e.g. 0x915400) are mapped to the same physical address (e.g. 0xf1a63400) The *kernel memory access* occurs first and ends as a *cache miss*. However, the first access to the application memory address ends up as a *cache hit. *I double checked with the cache trace and statistics to confirm this. One explanation is that these belong to two different threads and hence can have the same physical address due to context switching. However, if that is the case, access to the application address should end up as a miss (which is not the case). Any explanation is greatly appreciated. Thanks a lot in advance.
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