Hello Jason, Thanks for the reply, and sorry for previous Reply on the Digest.
To check if SPARC work with the Minor CPU, I changed the option in the following file: ~/gem5/build_opt/SPARC 1 TARGET_ISA = 'sparc' 2 CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU' 3 PROTOCOL = 'MI_example' ~ ~ Then, I recompiled the GEM5 binary and tried to run the simulation with the following command: $GEM5_EXE_LOC/gem5.perf $RUN_MODE_LOC/se.py -n 1 --cpu-type=minor --caches --l1d_size="8kB" --l1i_size="16kB" —l2cache --l2_size="3MB" --l2_assoc="12" --cpu-clock="1.2GHz" --sys-voltage="1.2V" --mem-size="1024MB" -c $TEST_LOC/hello/bi n/sparc/linux/hello This creates an error saying only allowed CPU types are Atomic/Simple/detailed. Do I need to make any other changes in order to see if SPARC is supported with the detailed InOrderCPU (which is MinorCPU) now. Also, notice in the SPARC file, the “PROTOCOL” is set to “MI_example” which is equivalent to SPARC’s “Valid/Invalid” cache status. Question is, is this protocol by default used by the Ruby memory system? What about the Classic Memory system, cause I read it uses “MOESI” protocol by default. In that case can I use it with “MI_example” protocol? Basically I am trying to mimic the SPARC T1 to run the workloads on 1 core (4 HW threads) and generate equivalent power in the Core using McPAT. Sincerely Monir Zaman
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