Hello, It seems that you're compiling for 32 bits processors, but for reference in gem5/AArch64 the SIMD mnemonics may be exactly the same as the SISD ones, sometimes only the register naming changes. It can be quite confusing to understand at first, indeed these parts of the code could be refactored.
Regards, -- Fernando A. Endo, Post-doc INRIA Rennes-Bretagne Atlantique France 2016-11-08 17:51 GMT+01:00 Raul Garcia <[email protected]>: > Hello All, > > I am analyzing the execution trace of an program running on gem5 > configured to simulate an arm processor. > The program that I'm running contains some vector (NEON) instructions (I > have disassembled the program so I know it contains NEON instructions, at > least vmov, vmul, vneg, vldr, vstr, and others), however after I get the > execution trace I don't find any NEON instruction executed. > > > I am using the SE mode with this command line: > > ./build/ARM/gem5.opt --debug-flags=Exec ./configs/example/se.py > --cpu-type=arm_detailed --caches --l2cache -c my_program > > Is there a reason why I'm not seeing any NEON instruction in the trace? Is > my configuration wrong? > > Regards, > Raul > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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