Hi all,
I run simulations on full system mode with detailed CPUs and ruby
(MESI_CMP_directory protocol). In my simulations, L1 cache is private and
L2cache is shared among the cores. As ruby simulates memory subsystem
(includingL1 and L2 caches), I wonder how setting the clock for ruby affects
theperformance of L1/L2 caches in relation to the CPUs? In other words, if
weincrease ruby clock, does it only cause faster execution of memory
operations(e.g. load and store instructions) inside caches? or does it increase
the bus bandwidth, the amount of data read from or stored into caches per clock
cycle?
I appreciate if someone clarifies this.
Thanks,Shervin
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