Or even better: make sure you have pydot installed and you will get a graphical 
representation of the system topology. Just have a look at config.dot.svg or 
config.dot.pdf

Andreas

From: gem5-users 
<[email protected]<mailto:[email protected]>> on behalf of 
Jason Lowe-Power <[email protected]<mailto:[email protected]>>
Reply-To: gem5 users mailing list 
<[email protected]<mailto:[email protected]>>
Date: Monday, 5 December 2016 at 14:48
To: gem5 users mailing list <[email protected]<mailto:[email protected]>>
Subject: Re: [gem5-users] Cache enabling

Hi Pranshu,

Are you using a timing CPU model (TimingSimpleCPU, MinorCPU, or DerivO3CPU)? 
Also, you should read the python config file code carefully and make sure that 
it is generating the system you are expecting (e.g., when you don't have caches 
enable there actually aren't any caches). You can also look at m5out/config.ini 
to see the exact system you simulated.

Jason

On Mon, Dec 5, 2016 at 4:42 AM Pranshu Kalra 
<[email protected]<mailto:[email protected]>> 
wrote:
So I was running a PARSEC benchmark on an ARM system with 4 cores. I ran the 
benchmark without any caches enabled. Then I enabled the L1 cache. In both the 
cases my execution time came out to be unchanged. I tried changing the 
associativity, the cache size. But the execution time still remains constant. 
Can anybody tell me what I am missing here?

Pranshu Kalra
B.E(Hons) Electrical and Electronics
Birla Institute of Technology and Science, Pilani
Ph : +91 7597634875<tel:+91%2075976%2034875>








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