Hi Bhaskar, To add to Jason's note -- if you are using ruby, you can create the tiled topology you described by writing your own topology file. Look at configs/topologies/MeshDirCorners for reference ... You can connect your directory controller to a router and that router to other routers or the L1 controllers.
The difference between simple and garnet will be the accuracy of the router model. Cheers, Tushar On Feb 20, 2017, at 4:05 PM, Bhaskar Kalita <[email protected]<mailto:[email protected]>> wrote: Hello Jason, Thanks for your response. I am using the ruby cache and I am making change in the "MESI_Two_Level". I want to create a 16 tile architecture where each tile will have a CPU, a L1ICache, L1DCache, and a L2Cache which is shared among all the cores. I have added a new component called "CenterTag" which is like a directory controller and want to connect it to the four centre tiles i.e tile 5,6,9 and 10. I have also created the necessary .sm file for "CenterTag" and also the .cc and .hh files in "ruby/structures" accordingly. I want to know what are the necessary connections I need to do in the ruby ports to get the desired architecture. Thanks, Bhaskar On 20-Feb-2017 9:33 pm, "Jason Lowe-Power" <[email protected]<mailto:[email protected]>> wrote: Hi Bhaskar, If you are concerned with modeling interconnection networks you should use Garnet, not the SimpleNetwork. Note: Both of these are part of Ruby, so you have to use the Ruby caches, not the classic caches. Additionally, to create at tiled architecture in Ruby will involve writing your own topology configuration file (in configs/topologies). If you don't care about what coherence protocol is executing and you aren't trying to model a high-fidelity interconnection network, you could probably use the classic caches to model a tiled system. You may have to create a new router object that plays with the classic caches, though. It would look similar to the coherent crossbar, but implement routing instead of a crossbar ;). Cheers, Jason On Sat, Feb 18, 2017 at 11:48 AM Bhaskar Kalita <[email protected]<mailto:[email protected]>> wrote: Hello everyone, I am Bhaskar and for my project I want to create a Tiled architecture where a tile contains a CPU, a L1 cache and a L2 cache which is a shared among other tiles. Multiple tiles in a chip are interconnected by a router. My question is that does the "simpleNetwork" present in gem5 allow me to do that or do I need to switch to garnet network. And also I would like to ask that what are the other things that I need to do to do the same. Regards, Bhaskar _______________________________________________ gem5-users mailing list [email protected]<mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected]<mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected]<mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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