Hi Naresh, The ISA does not affect the names of the cache statistics (for the most part). The caches are fully independent of the ISA. The only difference is that some ISA use slightly different memory commands (e.g., for atomics).
What you're seeing is that we have updated the cache statistics and not updated the McPAT scripts. There's a couple of things you can do here. You can dig into the code to figure out what each statistic means and then update the McPAT scripts accordingly. Or, what may be easier, is to find the changeset that made these changes to the cache statistics and look at what the previous stats were to relate the previous stats to the current ones. Jason On Thu, Mar 9, 2017 at 4:39 PM Naresh Giri <[email protected]> wrote: > Hi everybody, > > I am trying to convert the GEM5 output to McPAT input. I have done > simulation for PARSEC benchmark in ALPHA full system mode architecture. I > have used the fs.py configuration and enabled --caches --l2cache in > the command line. > > I have followed the instruction for conversion from [1]. For conversion of > L2 Cache (in [1] page 125) we need these output statistics on stats.txt > file. > system.l2.ReadReq_accessses::total, > system.l2.ReadReq_misses::total, > system.l2.WriteReq_accessess::total, > system.l2.Writeback_accessess::total > > > In my simulation, I do not get these parameters. Instead, I obtain fields > like > system.l2.ReadExReq_accessses::total, > system.l2.ReadCleanReq_accessses::total, > system.l2.ReadSharedReq_accessses::total, > system.l2.WritebackDirty_accesses::total, > system.l2.WritebackClean_accesses::total, etc. > > Is there any way I can calculate L2 cache total read_accesses, > write_accesses by using these parameters? > The paper [1] has done simulations in X86 architecture, and I am doing in > simulation for ALPHA architecture, does it makes difference in output for > L2 Cache statistics? I don't know why those parameters do not show in my > simulation. > > [1] https://tel.archives-ouvertes.fr/tel-01285964/document > > Many Thanks. > Naresh Giri > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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