Hi Jason, I'm not an expert on RISC-V, but this patch on gerrit may help: https://gem5-review.googlesource.com/c/3860/.
Cheers, Jason On Wed, Jul 5, 2017 at 10:56 AM 孙靖渊 <[email protected]> wrote: > Hello, > I’m trying to setup gem5 with RISC-V, the example hello binary in ./test > folder works fine on both scenario but > A) On Ubuntu (both 17.04 and 14.04), whatever binary (compiled with > riscv64-unknown-elf-gcc) I supply, I would get the error: > > Traceback (most recent call last): > File "<string>", line 1, in <module> > File "/home/jason/gem5/src/python/m5/main.py", line 433, in main > exec filecode in scope > File "./configs/example/se.py", line 287, in <module> > Simulation.run(options, root, system, FutureClass) > File "/home/jason/gem5/configs/common/Simulation.py", line 589, in run > m5.instantiate(checkpoint_dir) > File "/home/jason/gem5/src/python/m5/simulate.py", line 115, in > instantiate > for obj in root.descendants(): obj.createCCObject() > File "/home/jason/gem5/src/python/m5/SimObject.py", line 1482, in > createCCObject > self.getCCParams() > File "/home/jason/gem5/src/python/m5/SimObject.py", line 1423, in > getCCParams > value = value.getValue() > File "/home/jason/gem5/src/python/m5/params.py", line 245, in getValue > return [ v.getValue() for v in self ] > File "/home/jason/gem5/src/python/m5/SimObject.py", line 1486, in > getValue > return self.getCCObject() > File "/home/jason/gem5/src/python/m5/SimObject.py", line 1464, in > getCCObject > params = self.getCCParams() > File "/home/jason/gem5/src/python/m5/SimObject.py", line 1432, in > getCCParams > setattr(cc_params, param, list(value)) > TypeError: (): incompatible function arguments. The following argument > types are supported: > 1. (self: _m5.param_Process.ProcessParams, arg0: List[unicode]) -> None > Invoked with: <_m5.param_Process.ProcessParams object at 0x7fa2cfaa3240>, > ['/home/jason/\xe4\xb8\x8b\xe8\xbd\xbd/hello’] > > > B) On macOS (10.13), simple programs work fine (e.g. empty main function), > but when I run hello binary (compiled with riscv64-unknown-elf-gcc), I > would get: > panic: Unknown instruction 0x00000000 at pc 0x0000000000012a28 > Here’s a snippet of the end of the Exec trace: > @__swsetup_r+116 : jalr zero, ra, 0 : IntAlu > : D=0x0000000000013ebc > @__sfvwrite_r+272 : unknown opcode 0x00 : No_OpClass : > pc value appears to be correct, and according to the assembly file I > dumped from the hello binary, the instruction at offset 12a28 is valid > (0xfff00793 li a5, -1) instead of 0x00000000. > The problem seems to be somewhat similar to that in this thread > http://www.mail-archive.com/[email protected]/msg21438.html, but no > solution was offered. > > I would appreciate any help regarding either problem. > > Thanks, > Jason > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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