hello all,

  I emulate the same program in x86-se and x86-fs modes ,I have two puzzles  
when I get the stats.txt

puzzle 1: the sim_seconds is huge different

puzzle 2:the TLB accesses is huge different

here is my program

#include <stdio.h>
void main(){
int a [10240];
int i=0;
int sum;
for(i=0;i<=10239;i++)
   {
     a[i]=i;

}
printf("%d\n",a[i-1]);

}

The following is the simulation results

se model  :
commend line:build/X86/gem5.opt configs/example/se.py 
--cpu-type=TimingSimpleCPU --caches - c mountfile/arrraywritenew

stats.txt:

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.000515                       # 
Number of seconds simulated
sim_ticks                                   515234000                       # 
Number of ticks simulated

system.cpu.dtb.rdAccesses                       63141                       # 
TLB accesses on read requests
system.cpu.dtb.wrAccesses                       32281                       # 
TLB accesses on write requests
system.cpu.dtb.rdMisses                            72                       # 
TLB misses on read requests
system.cpu.dtb.wrMisses                            24                       # 
TLB misses on write requests
system.cpu.itb.rdAccesses                           0                       # 
TLB accesses on read requests
system.cpu.itb.wrAccesses                      225198                       # 
TLB accesses on write requests
system.cpu.itb.rdMisses                             0                       # 
TLB misses on read requests
system.cpu.itb.wrMisses                            74                       # 
TLB misses on write requests


 

 

FS model:
common line:build/X86/gem5.opt configs/example/se.py --cpu-type=TimingSimpleCPU 
--caches  --script=configs/boot/arraywrite.rcS


stats.txt
--------- Begin Simulation Statistics ----------
sim_seconds                                  5.308574                       # 
Number of seconds simulated
sim_ticks                                5308574319000                       # 
Number of ticks simulated
final_tick                               5308574319000 
 
 system.cpu.dtb.rdAccesses                    16111843                       # 
TLB accesses on read requests
system.cpu.dtb.wrAccesses                    10662308                       # 
TLB accesses on write requests
system.cpu.dtb.rdMisses                          7951                       # 
TLB misses on read requests
system.cpu.dtb.wrMisses                          1181                      
  system.cpu.itb.rdAccesses                           0                       # 
TLB accesses on read requests
system.cpu.itb.wrAccesses                   163647017                       # 
TLB accesses on write requests
system.cpu.itb.rdMisses                             0                       # 
TLB misses on read requests
system.cpu.itb.wrMisses                          3946   

 

Thanks in advance

regards

lily
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