The codebase has a fault model based on http://projects.csail.mit.edu/wiki/pub/LSPgroup/PublicationList/FaultModel_DAC2011.pdf <http://projects.csail.mit.edu/wiki/pub/LSPgroup/PublicationList/FaultModel_DAC2011.pdf> I believe it generates probabilities of failures for a given NoC configuration when you enable it (--enable-fault-model). I have not used it myself however. But it does not actually inject faults into the network.
For what you want to do, you can directly go into the codebase and start garbling certain outputs based on a certain probability. - Tushar > On Oct 18, 2017, at 1:21 AM, Ayaz Hussain <academia4a...@gmail.com> wrote: > > Respected > I am working in the domain of Network on chip. My Research area includes > fault tolerance in network on chip design. I am interested in seeing the > effect of single fault in garnet simulator. For example Routing Computation > doing wrong computation. After injection of this fault in Router Architecture > design the code compiled successfully but after some time the simulation > stuck. or giving error core dumbed, > Any body has worked in this domain please help me to figure out how to inject > faults in the Router architecture design . > Waiting for nice response > Regards > Ayaz > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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