Dear all,
I would like to improve the simulation consideration in GEM5.
My preference is to simulate NAS benchmark applications with more than
128 cores.
As the alpha chip is allowed to implemented with 64 core, I would like
to add multiple alpha chip to design the full system with more than 128
core.
Hence, please let me know the configuration to integrate multiple alpha
chip within the same simulation and the method to run the NAS benchmarks
in GEM5.
It will be a great help for me if I would have your reply as earliest.
Thanks in advance for your kind help.
Yours sincerely,
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