Hi all, I'm trying to send instructions from a CPU to an accelerator through a SystemXBar (I need the bus as, eventually, I'll add more of these components to the system). In my first attempt, I tried to create ports on the CPU/accelerator similar to the ones used as memory ports so I could use the existing xbar to communicate. However, these Master/SlavePorts require me to use Packets and Requests, which, if I understand correctly, are tied to valid memory addresses. Does anybody know if there is an implemented bus/port type which I could use in this case?
Regards, Jeckson
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