I am not sure, but I think that this might be the same case as for caches: https://stackoverflow.com/questions/49008792/why-doesnt-the-linux-kernel-see-the-cache-sizes-in-the-gem5-emulator-in-full-sy
Although gem5 can create fake DTBs, it cannot perfectly emulate all informational registers, which the Linux kernel seem to use to get this kind of information from. I would - double check that the m5out/config.ini contains the correct values, that should always be correct - play around with affinities and verify that the small CPUs run content slower than the larger ones - confirm in the linux kernel source code that the information actually comes from a register which gem5 just puts a dummy fixed value for On Wed, Apr 25, 2018 at 7:45 PM, Peter De Groot <pdegr...@andrew.cmu.edu> wrote: > When we updated the command to include the dtb file, all 4 cores came > online. > We are now running the command: ./build/ARM/gem5.opt > configs/example/arm/fs_bigLITTLE.py --big-cpus=2 --little-cpus=2 --disk > /home/peter/Desktop/aarch/disks/expanded-linaro-minimal-aarch64.img > --bootscript > /home/peter/Desktop/arm-gem5-rsk/parsec_rcs/blackscholes_simlarge_4.rcS > --kernel /home/peter/Desktop/linux-arm-gem5/vmlinux --dtb > /home/peter/Desktop/gem5/system/arm/dt/armv8_gem5_v1_big_little_2_2.dtb > --caches --cpu-type=timing > > I've also removed the minimum number of threads that PARSEC has to produce > from the rcS script. > Once we added the dtb file, the boot messages changed from: 1 CPU brought > online to 4 CPU brought online. > > When we run cat /proc/cpuinfo, we get the below output: > processor : 0 > BogoMIPS : 9994.24 > Features : fp asimd evtstrm > CPU implementer : 0x41 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0xc0f > CPU revision : 0 > > processor : 1 > BogoMIPS : 9994.24 > Features : fp asimd evtstrm > CPU implementer : 0x41 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0xc0f > CPU revision : 0 > > processor : 2 > BogoMIPS : 9994.24 > Features : fp asimd evtstrm > CPU implementer : 0x41 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0xc0f > CPU revision : 0 > > processor : 3 > BogoMIPS : 9994.24 > Features : fp asimd evtstrm > CPU implementer : 0x41 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0xc0f > CPU revision : 0 > > Is it intended for the ARMv8 big.LITTLE info to output the same CPU part > when it is running O3_ARM_v7a_3 and Minor CPUs? > > Thanks, > Peter de Groot > > On Wed, Apr 25, 2018 at 8:51 AM, Ciro Santilli <ciro.santi...@gmail.com> > wrote: >> >> Ah, forgot to CC you. >> >> >> ---------- Forwarded message ---------- >> From: Ciro Santilli <ciro.santi...@gmail.com> >> Date: Wed, Apr 25, 2018 at 10:15 AM >> Subject: Re: [gem5-users] ARM big.LITTLE simulation, only one core >> working? >> To: gem5 users mailing list <gem5-users@gem5.org> >> >> >> I will be trying to reproduce this soon I hope, but in the meantime, >> can you check things like: >> >> - does /proc/cpuinfo show multiple cpus? >> - do kernel boot messages show multiple cpus being brought up? >> - does the problem happen for other content, or just PARSEC? E.g. you >> could try to install and run "stress -c 16", which is simple and >> definitely uses multiple threads >> - play around with process affinity, e.g. >> >> https://unix.stackexchange.com/questions/23106/how-to-limit-a-process-to-one-cpu-core-in-linux >> >> On Sun, Apr 22, 2018 at 4:14 AM, Peter De Groot <pdegr...@andrew.cmu.edu> >> wrote: >> > Hello, >> > >> > I ran the blackscholes PARSEC benchmark on an ARM big.LITTLE >> > configuration >> > with 2 big cores and 2 small cores. It seems cpus0 in the bigCluster is >> > the >> > only one that has cache data according to stats.txt. The relevant >> > entries >> > for the other CPUs are either missing or NaN. Do you have any ideas as >> > to >> > how I could get the cache information for the other CPUs, or if the >> > simulation is even working correctly? >> > >> > I simulated with this command: ./build/ARM/gem5.opt >> > configs/example/arm/fs_bigLITTLE.py --big-cpus=2 --little-cpus=2 --disk >> > /home/peter/Desktop/aarch/disks/expanded-linaro-minimal-aarch64.img >> > --bootscript >> > /home/peter/Desktop/arm-gem5-rsk/parsec_rcs/blackscholes_simlarge_4.rcS >> > --kernel /home/peter/Desktop/linux/vmlinux --caches >> > >> > The rcS file used is: >> > >> > #!/bin/bash >> > >> > PARSEC_DIR="/home/root/parsec-3.0" >> > cd $PARSEC_DIR >> > pwd >> > >> > source ./env.sh >> > parsecmgmt -a run -p blackscholes -c gcc-hooks -i simlarge -n 4 >> > m5 exit >> > >> > I copied the stats file to Pastebin here: https://pastebin.com/BAvbSmiv >> > >> > Thanks, >> > Peter de Groot >> > >> > >> > _______________________________________________ >> > gem5-users mailing list >> > gem5-users@gem5.org >> > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
