Hi all,

There appear to be several calls in the src/power/isa/decoder.isa file to
bits() and insertBits() (both in src/base/bitfield.hh) that have the first
and last fields backwards.  Based on other calls to these functions in
decoder.isa, I believe first is supposed to be the MSb and last is supposed
to be the LSb.  However the following calls seem to invert this assumption:

decoder.isa: 583
FPSCR = insertBits(FPSCR, k, k + 3,
                              bits(Fb_uq, k, k + 3))

decoder.isa: 161
if(bits(Rs, n, n+7) == bits(Rb, n, n+7)) {
    val = insertBits(val, n, n+7, 0xff);
}

(for example, compared to the above calls line 464 has the opposite order
for first and last)

Can someone please confirm if this is the case?  Assuming I'm right, I can
push a patch.

Thanks,
Matt
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to