As mentioned at:
https://www.mail-archive.com/gem5-dev@gem5.org/msg24593.html you need
to:

- use the ARM linux kernel fork from:
https://gem5.googlesource.com/arm/linux/+/refs/heads/gem5/v4.15 in
particular the GICv2 extension script commit
- hack up gem5:
  - fs.py to set `root.system.realview.gic.gem5_extensions = True`
  - generate a 32 / 64 / etc. dtb if needed (16 already built by default)

The following patch will do both:

```
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 4031fd05e..51dd1d4ff 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -395,5 +395,6 @@ if buildEnv['TARGET_ISA'] == "arm" and options.generate_dtb:
             sys = getattr(root, sysname)
             sys.dtb_filename = create_dtb_for_system(sys, '%s.dtb' % sysname)

+root.system.realview.gic.gem5_extensions = True
 Simulation.setWorkCountOptions(test_sys, options)
 Simulation.run(options, root, test_sys, FutureClass)
diff --git a/system/arm/dt/Makefile b/system/arm/dt/Makefile
index 62cf65f27..66f17a3c4 100644
--- a/system/arm/dt/Makefile
+++ b/system/arm/dt/Makefile
@@ -38,6 +38,8 @@ TARGETS=\
  armv8_gem5_v1_1cpu.dtb armv8_gem5_v1_2cpu.dtb \
  armv8_gem5_v1_4cpu.dtb armv8_gem5_v1_8cpu.dtb \
  armv8_gem5_v1_16cpu.dtb \
+ armv8_gem5_v1_32cpu.dtb \
+ armv8_gem5_v1_64cpu.dtb \
  armv8_gem5_v1_big_little_2_2.dtb \
  armv8_gem5_v1_big_little_2_4.dtb

diff --git a/system/arm/dt/armv8.dts b/system/arm/dt/armv8.dts
index 9e07decbd..ddef086a4 100644
--- a/system/arm/dt/armv8.dts
+++ b/system/arm/dt/armv8.dts
@@ -105,6 +105,150 @@
  CPU(15)
  #endif
  #if CONF_CPUS > 16
+ CPU(16)
+ #endif
+ #if CONF_CPUS > 17
+ CPU(17)
+ #endif
+ #if CONF_CPUS > 18
+ CPU(18)
+ #endif
+ #if CONF_CPUS > 19
+ CPU(19)
+ #endif
+ #if CONF_CPUS > 20
+ CPU(20)
+ #endif
+ #if CONF_CPUS > 21
+ CPU(21)
+ #endif
+ #if CONF_CPUS > 22
+ CPU(22)
+ #endif
+ #if CONF_CPUS > 23
+ CPU(23)
+ #endif
+ #if CONF_CPUS > 24
+ CPU(24)
+ #endif
+ #if CONF_CPUS > 25
+ CPU(25)
+ #endif
+ #if CONF_CPUS > 26
+ CPU(26)
+ #endif
+ #if CONF_CPUS > 27
+ CPU(27)
+ #endif
+ #if CONF_CPUS > 28
+ CPU(28)
+ #endif
+ #if CONF_CPUS > 29
+ CPU(29)
+ #endif
+ #if CONF_CPUS > 30
+ CPU(30)
+ #endif
+ #if CONF_CPUS > 31
+ CPU(31)
+ #endif
+ #if CONF_CPUS > 32
+ CPU(32)
+ #endif
+ #if CONF_CPUS > 33
+ CPU(33)
+ #endif
+ #if CONF_CPUS > 34
+ CPU(34)
+ #endif
+ #if CONF_CPUS > 35
+ CPU(35)
+ #endif
+ #if CONF_CPUS > 36
+ CPU(36)
+ #endif
+ #if CONF_CPUS > 37
+ CPU(37)
+ #endif
+ #if CONF_CPUS > 38
+ CPU(38)
+ #endif
+ #if CONF_CPUS > 39
+ CPU(39)
+ #endif
+ #if CONF_CPUS > 40
+ CPU(40)
+ #endif
+ #if CONF_CPUS > 41
+ CPU(41)
+ #endif
+ #if CONF_CPUS > 42
+ CPU(42)
+ #endif
+ #if CONF_CPUS > 43
+ CPU(43)
+ #endif
+ #if CONF_CPUS > 44
+ CPU(44)
+ #endif
+ #if CONF_CPUS > 45
+ CPU(45)
+ #endif
+ #if CONF_CPUS > 46
+ CPU(46)
+ #endif
+ #if CONF_CPUS > 47
+ CPU(47)
+ #endif
+ #if CONF_CPUS > 48
+ CPU(48)
+ #endif
+ #if CONF_CPUS > 49
+ CPU(49)
+ #endif
+ #if CONF_CPUS > 50
+ CPU(50)
+ #endif
+ #if CONF_CPUS > 51
+ CPU(51)
+ #endif
+ #if CONF_CPUS > 52
+ CPU(52)
+ #endif
+ #if CONF_CPUS > 53
+ CPU(53)
+ #endif
+ #if CONF_CPUS > 54
+ CPU(54)
+ #endif
+ #if CONF_CPUS > 55
+ CPU(55)
+ #endif
+ #if CONF_CPUS > 56
+ CPU(56)
+ #endif
+ #if CONF_CPUS > 57
+ CPU(57)
+ #endif
+ #if CONF_CPUS > 58
+ CPU(58)
+ #endif
+ #if CONF_CPUS > 59
+ CPU(59)
+ #endif
+ #if CONF_CPUS > 60
+ CPU(60)
+ #endif
+ #if CONF_CPUS > 61
+ CPU(61)
+ #endif
+ #if CONF_CPUS > 62
+ CPU(62)
+ #endif
+ #if CONF_CPUS > 63
+ CPU(63)
+ #endif
+ #if CONF_CPUS > 64
  #error Unsupported number of CPUs
  #endif
  };

```

(generated with vim macros and Ctrl-a :-))

I have just confirmed that this procedure works.

fs_bigLITTLE.py apparently can automatically generate the DTBs without
the ugly patch.


On Tue, May 8, 2018 at 11:09 PM, Haiyang Han
<haiyang....@eecs.northwestern.edu> wrote:
> Hi all,
>
> I'm experiencing problems trying to boot up a 16-core ARM system. The
> command line I'm using is:
> /home/hhu010/tools/gem5/build/ARM/gem5.opt
> /home/hhu010/tools/gem5/configs/example/fs.py
> --disk-image=/home/hhu010/tools/arm-gem5-rsk/fs_files/disks/aarch64-parsec-3.0-all.img
> --caches --l2cache --machine-type=VExpress_GEM5_V1 -n 16
>
> I can boot up with 1, 2 ,4 and 8 cores but with 16 cores, the terminal
> doesn't output anything.
>
> Does anyone have a similar problem?
>
> Thanks,
> Haiyang
>
> _______________________________________________
> gem5-users mailing list
> gem5-users@gem5.org
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
_______________________________________________
gem5-users mailing list
gem5-users@gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to