Hi Ryan. Please don't resend an email to the gem5 list. If you're email
hasn't gotten a response yet and you want to make sure it hasn't been
missed, you can just reply to the original. Also, please use gem5-users for
these sorts of questions. The devs will still see the email, and so will
more people that might be able to help, or might benefit from the answer.
The trigger mode registers are a bank of registers which report for each of
the 256 vectors what the trigger mode was (edge or level) for the
accepted/pending interrupt on that vector. They're similar to the ISR and
IRR registers which mark whether an interrupt is in service or has been
requested. I'm not sure what the i8254 driver needs that info for, but
apparently it's trying to read that register which has never been
implemented, probably because nothing has tried to use it before. I think
the information needed to fill in that register is available in the x86
local APIC implementation, so it should be relatively straightforward to
plumb it into place, although you might need to study the code a bit to
figure out exactly how. Alternatively, if you can figure out what that
driver is using the value it gets for, you might be able to just locally
hard code the local APIC to return an value that will give the right
behavior.
Gabe
On Fri, Jul 6, 2018 at 5:11 PM Ryan Wang <ryan.jb.w...@gmail.com> wrote:
> Hi, All, (Particularly to Gabe)
> I was trying to bring up NIC(from i8254xGBe.cc) in a kernel (4.9) for x86
> system. However I got the panic in interrupts.cc as follows:
>
> panic("Local APIC Trigger Mode registers are unimplemented.\n");
>
> which was called in function readReg().
>
> It happens because the reg value is 26, which falls between
> APIC_TRIGGER_MODE(0) and APIC_TRIGGER_MODE(15) (25 and 40).
>
> Do you think if I should try to implement this part or I missed
> something in the configuration?
>
> Regards,
> Ryan
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