Hi Nikos,
It's hard to say which MemObject received the packet where the flag cacheResponding was set. In typical Arm systems (not very different from the one you have), packets with cacheResponding set would stop at the CoherentXBar which has the point_of_coherence parameter set (configuration parameter). In your system, I would start by making sure that MemBus has point_of_coherence set.
That was simple. "point_of_coherency" was exactly the option I was looking for. Thank you very much!
Best Regards, Sebastian
smime.p7s
Description: S/MIME Cryptographic Signature
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
