Pseudo instructions haven't been implemented yet for RISC-V, so you're
right in that you wouldn't be able to use them to do it. You could,
however, implement a new CSR that tracks the current tick in a similar way
to how the cycle CSR returns the clock cycle counter. If you look at
src/arch/riscv/isa.cc:readMiscReg, you can see how it's done and model it
after that.
On Sat, Apr 6, 2019 at 3:17 PM Pedro Henrique Exenberger Becker <
phebec...@inf.ufrgs.br> wrote:
> Hi,
> I would like to trace the current tick in some points of an application
> running under gem5 with the RISC-V isa and SE mode. Like:
>
> main()
> {
> foo();
> print_current_tick_here();
> bar();
> }
>
> Is there a simple solution to do this?
> I know that m5_dumpstats() can output this information within a whole new
> stats file, but I really wanted to print it as a part of the trace file,
> together with the output from debug flags.
> As I understand it, I could implement a pseudo instruction and print it
> from there, but there is no util/m5/m5op_riscv.S which I guess would be
> necessary to implement it, right?
> A similar question
> https://www.mail-archive.com/gem5-users@gem5.org/msg12415.html was
> answered with the gem5 tutorials link, but I haven't found the refereed
> topic there.
> Any tips on this?
>
> Thank you in advance,
> Pedro Becker.
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