Hi all, My doubt is why is the CPU dcache port snooping requests but at the same time if a snoop request reaches the port, the assertion "system.cpu.dcache_port was not expecting a timing snoop request" is happening. Thanks for the help.
-- Regards, Ashok Sathyan
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
