CMP is a class of macro-ops which is first decoded into microops here: src/arch/x86/isa/insts/general_purpose/compare_and_test/compare.py
So to compare a register value with a memory value, we have the variant CMP_R_M that is decoded as: def macroop CMP_R_M { ld t1, seg, sib, disp sub t0, reg, t1, flags=(OF, SF, ZF, AF, PF, CF) }; The implementation of the individual microops ld, sub and others can be found in: src/arch/x86/isa/microops/*.isa Cheers, Swapnil Haria, PhD Candidate, Dept of Computer Sciences, University of Wisconsin-Madison http://pages.cs.wisc.edu/~swapnilh/ On Mon, Jul 29, 2019 at 9:31 AM SHAH HASSAN <shahhas...@live.com> wrote: > Hello Members, > > Can somebody help me identify this. > > Where is x86 CMP instruction execute logic implemented ? > > I can see CMP encoding here. > src/arch/x86/decoder/one_byte_opcode.isa > > But I am not sure where is the execute logic implemented. > > Thanks > Shah > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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