Hi All, I had one question regarding write buffers in Classic cache. When we have a write back operation, the assumption is that we will find an entry to place the block that is to be written back. There seems to be an assert within src/mem/cache/write_queue.cc file (*assert(!freeList.empty())*). I assume, if we make any microarchitectural change that induces more writebacks, then I guess the simulator will not stall, but the assert would fire instead? Is my understanding correct?
If I am making such a microarchitectural change, then I assume my options are to either increase writebuffer entries from the default, or force a stall at that point (which I am not too sure how to do). Thanks, Shyam
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