Thanks Gerzhoy for your email.

The code is attached here. I got the error for some of benchmarks not for all.

I used this command to run the code
/home/abdkhail/aa/gem5/build/X86/gem5.opt --outdir=/home/abdkhail/aa/gem5/o1 
/home/abdkhail/aa/gem5/configs/example/spec06_config.py -I 1000000000 
--benchmark=povray --benchmark_stdout=/home/abdkhail/aa/gem5/o1/povray.out 
--benchmark_stderr=/home/abdkhail/aa/gem5/o1/povray.err --cpu-type=DerivO3CPU 
--caches

I observed when i changed --cpu-type=DerivO3CPU  to another CPU type it is 
working fine but i have to get the stats output of this type 
--cpu-type=DerivO3CPU .

Best Regards

________________________________
From: gem5-users <[email protected]> on behalf of Daniel Gerzhoy 
<[email protected]>
Sent: Friday, November 22, 2019 7:05 PM
To: gem5 users mailing list <[email protected]>
Subject: Re: [gem5-users] gem5 has encountered a segmentation fault!

It looks like gem5 itself had a segfault.

Did you change the simulator code itself?
If so I would look at whatever code you added to see if you referenced a memory 
address you don't actually have access to.

You could run the simulator in GDB as well and add breakpoints to debug further.

best regards,

Dan Gerzhoy

On Fri, Nov 22, 2019 at 1:55 PM ABD ALRHMAN ABO ALKHEEL 
<[email protected]<mailto:[email protected]>> wrote:
Hello Everyone,

I am currently working on running the benchmark on gem5 and some of them gave 
me the below error.

Any help in this regard? I would really appreciate  that.


Best Regards





Global frequency set at 1000000000000 ticks per second
warn: DRAM device capacity (8192 Mbytes) does not match the address range 
assigned (16384 Mbytes)
0: system.remote_gdb: listening for remote gdb on port 7000
info: Entering event queue @ 0.  Starting simulation...
**** REAL SIMULATION ****
info: Increasing stack size by one page.
warn: ignoring syscall access(...)
warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
gem5 has encountered a segmentation fault!

--- BEGIN LIBC BACKTRACE ---
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_Z15print_backtracev+0x2c)[0x55cda9d47dac]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(+0x584e7f)[0x55cda9d59e7f]
/lib/x86_64-linux-gnu/libpthread.so.0(+0x12890)[0x7f77bb174890]
/lib/x86_64-linux-gnu/libgcc_s.so.1(_Unwind_Resume+0xcf)[0x7f77b9b137df]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN6X86ISA7Decoder10decodeInstENS_11ExtMachInstE+0x4e609)[0x55cda9ee8659]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN6X86ISA7Decoder6decodeENS_11ExtMachInstEm+0x244)[0x55cda9e63db4]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN6X86ISA7Decoder6decodeERNS_7PCStateE+0x237)[0x55cda9e640b7]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN12DefaultFetchI9O3CPUImplE5fetchERb+0x941)[0x55cdaaa51301]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN12DefaultFetchI9O3CPUImplE4tickEv+0xcb)[0x55cdaaa5235b]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN9FullO3CPUI9O3CPUImplE4tickEv+0x12b)[0x55cdaaa349ab]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_ZN10EventQueue10serviceOneEv+0xd9)[0x55cda9d4ffb9]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_Z9doSimLoopP10EventQueue+0x87)[0x55cda9d708b7]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_Z8simulatem+0xcba)[0x55cda9d7190a]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(+0xd4ea5e)[0x55cdaa523a5e]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(+0x5e6954)[0x55cda9dbb954]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x5f82)[0x7f77bb42e522]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x7d8)[0x7f77bb560bf8]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6364)[0x7f77bb42e904]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x7d8)[0x7f77bb560bf8]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6364)[0x7f77bb42e904]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x7d8)[0x7f77bb560bf8]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6364)[0x7f77bb42e904]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x7d8)[0x7f77bb560bf8]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCode+0x19)[0x7f77bb428409]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x68a5)[0x7f77bb42ee45]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x7d8)[0x7f77bb560bf8]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6364)[0x7f77bb42e904]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x7d8)[0x7f77bb560bf8]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCode+0x19)[0x7f77bb428409]
/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyRun_StringFlags+0x76)[0x7f77bb4d86d6]
/home/abdkhail/aa/gem5/build/X86/gem5.opt(_Z6m5MainiPPc+0x83)[0x55cda9d58a43]
/home/abdkhail/aa/gem5/
_______________________________________________
gem5-users mailing list
[email protected]<mailto:[email protected]>
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
# Copyright (c) 2012-2013 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder.  You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
# Copyright (c) 2006-2008 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt

# Simple test script
#
# "m5 test.py"

import spec06_benchmarks


#from __future__ import print_function
#from __future__ import absolute_import

import optparse
import sys
import os

import m5
from m5.defines import buildEnv
from m5.objects import *
from m5.util import addToPath, fatal, warn

addToPath('../')

from ruby import Ruby

from common import Options
from common import Simulation
from common import CacheConfig
from common import CpuConfig
#from common import ObjectList
from common import MemConfig
from common.FileSystemConfig import config_filesystem
from common.Caches import *
from common.cpu2000 import *

def get_processes(options):
    """Interprets provided options and returns a list of processes"""

    multiprocesses = []
    inputs = []
    outputs = []
    errouts = []
    pargs = []

    workloads = options.cmd.split(';')
    if options.input != "":
        inputs = options.input.split(';')
    if options.output != "":
        outputs = options.output.split(';')
    if options.errout != "":
        errouts = options.errout.split(';')
    if options.options != "":
        pargs = options.options.split(';')

    idx = 0
    for wrkld in workloads:
        process = Process(pid = 100 + idx)
        process.executable = wrkld
        process.cwd = os.getcwd()

        if options.env:
            with open(options.env, 'r') as f:
                process.env = [line.rstrip() for line in f]

        if len(pargs) > idx:
            process.cmd = [wrkld] + pargs[idx].split()
        else:
            process.cmd = [wrkld]

        if len(inputs) > idx:
            process.input = inputs[idx]
        if len(outputs) > idx:
            process.output = outputs[idx]
        if len(errouts) > idx:
            process.errout = errouts[idx]

        multiprocesses.append(process)
        idx += 1

    if options.smt:
        assert(options.cpu_type == "DerivO3CPU")
        return multiprocesses, idx
    else:
        return multiprocesses, 1


parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addSEOptions(parser)


parser.add_option("-b", "--benchmark", type="string", default="", help="The 
SPEC benchmark to be loaded.")
parser.add_option("--benchmark_stdout", type="string", default="", 
help="Absolute path for stdout redirection for the benchmark.")
parser.add_option("--benchmark_stderr", type="string", default="", 
help="Absolute path for stderr redirection for the benchmark.")




if '--ruby' in sys.argv:
    Ruby.define_options(parser)

(options, args) = parser.parse_args()

if args:
    print("Error: script doesn't take any positional arguments")
    sys.exit(1)

#multiprocesses = []
numThreads = 1

if options.benchmark:
#    print 'Selected SPEC_CPU2006 benchmark'
    if options.benchmark == 'perlbench':
 #       print '--> perlbench'
        process = spec06_benchmarks.perlbench
    elif options.benchmark == 'bzip2':
  #      print '--> bzip2'

        process = spec06_benchmarks.bzip2
    elif options.benchmark == 'gcc':
   #     print '--> gcc'
        process = spec06_benchmarks.gcc
    elif options.benchmark == 'bwaves':
   #     print '--> bwaves'
        process = spec06_benchmarks.bwaves
    elif options.benchmark == 'gamess':
    #    print '--> gamess'
        process = spec06_benchmarks.gamess
    elif options.benchmark == 'mcf':
     #   print '--> mcf'
        process = spec06_benchmarks.mcf
    elif options.benchmark == 'milc':
      #  print '--> milc'
        process = spec06_benchmarks.milc
    elif options.benchmark == 'zeusmp':
       # print '--> zeusmp'
        process = spec06_benchmarks.zeusmp
    elif options.benchmark == 'gromacs':
       # print '--> gromacs'
        process = spec06_benchmarks.gromacs
    elif options.benchmark == 'cactusADM':
       # print '--> cactusADM'
        process = spec06_benchmarks.cactusADM
    elif options.benchmark == 'leslie3d':
       # print '--> leslie3d'
        process = spec06_benchmarks.leslie3d
    elif options.benchmark == 'namd':
       # print '--> namd'
        process = spec06_benchmarks.namd
    elif options.benchmark == 'gobmk':
       # print '--> gobmk'
        process = spec06_benchmarks.gobmk
    elif options.benchmark == 'dealII':
       # print '--> dealII'
        process = spec06_benchmarks.dealII
    elif options.benchmark == 'soplex':
       # print '--> soplex'
        process = spec06_benchmarks.soplex
    elif options.benchmark == 'povray':
       # print '--> povray'
        process = spec06_benchmarks.povray
    elif options.benchmark == 'calculix':
       # print '--> calculix'
        process = spec06_benchmarks.calculix
    elif options.benchmark == 'hmmer':
       # print '--> hmmer'
        process = spec06_benchmarks.hmmer
    elif options.benchmark == 'sjeng':
       # print '--> sjeng'
        process = spec06_benchmarks.sjeng
    elif options.benchmark == 'GemsFDTD':
       # print '--> GemsFDTD'
        process = spec06_benchmarks.GemsFDTD
    elif options.benchmark == 'libquantum':
       # print '--> libquantum'
        process = spec06_benchmarks.libquantum
    elif options.benchmark == 'h264ref':
       # print '--> h264ref'
        process = spec06_benchmarks.h264ref
    elif options.benchmark == 'tonto':
       # print '--> tonto'
        process = spec06_benchmarks.tonto
    elif options.benchmark == 'lbm':
       # print '--> lbm'
        process = spec06_benchmarks.lbm
    elif options.benchmark == 'omnetpp':
       # print '--> omnetpp'
        process = spec06_benchmarks.omnetpp
    elif options.benchmark == 'astar':
       # print '--> astar'
        process = spec06_benchmarks.astar
    elif options.benchmark == 'wrf':
       # print '--> wrf'
        process = spec06_benchmarks.wrf
    elif options.benchmark == 'sphinx3':
       # print '--> sphinx3'
        process = spec06_benchmarks.sphinx3
    elif options.benchmark == 'xalancbmk':
       # print '--> xalancbmk'
        process = spec06_benchmarks.xalancbmk
    elif options.benchmark == 'specrand_i':
       # print '--> specrand_i'
        process = spec06_benchmarks.specrand_i
    elif options.benchmark == 'specrand_f':
       # print '--> specrand_f'
        process = spec06_benchmarks.specrand_f
    else:
       # print "No recognized SPEC2006 benchmark selected! Exiting."
        sys.exit(1)
else:
    #print >> sys.stderr, "Need --benchmark switch to specify SPEC CPU2006 
workload. Exiting!\n"
    sys.exit(1)

# Set process stdout/stderr
if options.benchmark_stdout:
    process.output = options.benchmark_stdout
    #print "Process stdout file: " + process.output
if options.benchmark_stderr:
    process.errout = options.benchmark_stderr
    #print "Process stderr file: " + process.errout



#if options.bench:
 #   apps = options.bench.split("-")
  #  if len(apps) != options.num_cpus:
   #     print("number of benchmarks not equal to set num_cpus!")
    #    sys.exit(1)

    #for app in apps:
     #   try:
      #      if buildEnv['TARGET_ISA'] == 'alpha':
       #         exec("workload = %s('alpha', 'tru64', '%s')" % (
        #                app, options.spec_input))
         #   elif buildEnv['TARGET_ISA'] == 'arm':
          #      exec("workload = %s('arm_%s', 'linux', '%s')" % (
           #             app, options.arm_iset, options.spec_input))
            #else:
             #   exec("workload = %s(buildEnv['TARGET_ISA', 'linux', '%s')" % (
              #          app, options.spec_input))
           # multiprocesses.append(workload.makeProcess())
        #except:
         #   print("Unable to find workload for %s: %s" %
          #        (buildEnv['TARGET_ISA'], app),
           #       file=sys.stderr)
            #sys.exit(1)
#elif options.cmd:
 #   multiprocesses, numThreads = get_processes(options)
#else:
 #   print("No workload specified. Exiting!\n", file=sys.stderr)
  #  sys.exit(1)


(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
CPUClass.numThreads = numThreads

# Check -- do not allow SMT with multiple CPUs
if options.smt and options.num_cpus > 1:
    fatal("You cannot use SMT with multiple CPUs!")

np = options.num_cpus
system = System(cpu = [CPUClass(cpu_id=i) for i in range(np)],
                mem_mode = test_mem_mode,
               # mem_ranges = [AddrRange(options.mem_size)],
                mem_ranges = [AddrRange('16384MB')],

                cache_line_size = options.cacheline_size)

if numThreads > 1:
    system.multi_thread = True

# Create a top-level voltage domain
system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)

# Create a source clock for the system and set the clock period
system.clk_domain = SrcClockDomain(clock =  options.sys_clock,
                                   voltage_domain = system.voltage_domain)

# Create a CPU voltage domain
system.cpu_voltage_domain = VoltageDomain()

# Create a separate clock domain for the CPUs
system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock,
                                       voltage_domain =
                                       system.cpu_voltage_domain)

# If elastic tracing is enabled, then configure the cpu and attach the elastic
# trace probe
if options.elastic_trace_en:
    CpuConfig.config_etrace(CPUClass, system.cpu, options)

# All cpus belong to a common cpu_clk_domain, therefore running at a common
# frequency.
for cpu in system.cpu:
    cpu.clk_domain = system.cpu_clk_domain

#if ObjectList.is_kvm_cpu(CPUClass) or ObjectList.is_kvm_cpu(FutureClass):
 #   if buildEnv['TARGET_ISA'] == 'x86':
  #      system.kvm_vm = KvmVM()
   #     for process in multiprocesses:
    #        process.useArchPT = True
     #       process.kvmInSE = True
    #else:
     #   fatal("KvmCPU can only be used in SE mode with x86")

# Sanity check
#if options.simpoint_profile:
 #   if not ObjectList.is_noncaching_cpu(CPUClass):
  #      fatal("SimPoint/BPProbe should be done with an atomic cpu")
   # if np > 1:
    #    fatal("SimPoint generation not supported with more than one CPUs")

#for i in range(np):
 #   if options.smt:
  #      system.cpu[i].workload = multiprocesses
   # elif len(multiprocesses) == 1:
    #    system.cpu[i].workload = multiprocesses[0]
    #else:
     #   system.cpu[i].workload = multiprocesses[i]

    #if options.simpoint_profile:
     #   system.cpu[i].addSimPointProbe(options.simpoint_interval)

    #if options.checker:
     #   system.cpu[i].addCheckerCpu()

#    if options.bp_type:
 #       bpClass = ObjectList.bp_list.get(options.bp_type)
  #      system.cpu[i].branchPred = bpClass()

   # if options.indirect_bp_type:
    #    indirectBPClass = \
     #       ObjectList.indirect_bp_list.get(options.indirect_bp_type)
      #  system.cpu[i].branchPred.indirectBranchPred = indirectBPClass()

#    system.cpu[i].createThreads()

for i in xrange(np):
    #time_to_wait = '2us'
    system.cpu[i].workload = process
    #print process.cmd
    system.cpu[i].createThreads()

if options.ruby:
    Ruby.create_system(options, False, system)
    assert(options.num_cpus == len(system.ruby._cpu_ports))

    system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
                                        voltage_domain = system.voltage_domain)
    for i in range(np):
        ruby_port = system.ruby._cpu_ports[i]

        # Create the interrupt controller and connect its ports to Ruby
        # Note that the interrupt controller is always present but only
        # in x86 does it have message ports that need to be connected
        system.cpu[i].createInterruptController()

        # Connect the cpu's cache ports to Ruby
        system.cpu[i].icache_port = ruby_port.slave
        system.cpu[i].dcache_port = ruby_port.slave
        if buildEnv['TARGET_ISA'] == 'x86':
            system.cpu[i].interrupts[0].pio = ruby_port.master
            system.cpu[i].interrupts[0].int_master = ruby_port.slave
            system.cpu[i].interrupts[0].int_slave = ruby_port.master
            system.cpu[i].itb.walker.port = ruby_port.slave
            system.cpu[i].dtb.walker.port = ruby_port.slave
else:
    MemClass = Simulation.setMemClass(options)
    system.membus = SystemXBar()
    system.system_port = system.membus.slave
    CacheConfig.config_cache(options, system)
    MemConfig.config_mem(options, system)
    config_filesystem(system, options)

root = Root(full_system = False, system = system)
Simulation.run(options, root, system, FutureClass)
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