I want to use a OoO CPU with L1i, L1d, L2 cache attatched to 8 channels of
HBM1x128. However, due to the following address range error, I cannot simulate
it.
I mapped 8 HBM Memory channels with 128 byte interleaving in 1GB. It seems like
the system.membus coherent crossbar cannot find the target SlavePort. You can
see that the size of address range is 64bytes.
So, it seems like the interleaved address ranges do not contain [0x40:0x80]
address range.
This is weird, because interleaving size is 128 bytes, and the calling address
range is 64 bytes, and aligned.
This is the error & debug message.
Global frequency set at 1000000000000 ticks per second
warn: failed to generate dot output from m5out/config.dot
0: system.physmem: Creating backing store for range [0:0x40000000] with
size 1073741824
0: system.physmem: Mapping memory system.mem_ctrls0 to backing store
0: system.physmem: Mapping memory system.mem_ctrls1 to backing store
0: system.physmem: Mapping memory system.mem_ctrls2 to backing store
0: system.physmem: Mapping memory system.mem_ctrls3 to backing store
0: system.physmem: Mapping memory system.mem_ctrls4 to backing store
0: system.physmem: Mapping memory system.mem_ctrls5 to backing store
0: system.physmem: Mapping memory system.mem_ctrls6 to backing store
0: system.physmem: Mapping memory system.mem_ctrls7 to backing store
0: system.remote_gdb: listening for remote gdb on port 7000
0: system.membus: Received range change from slave port
system.cpu.interrupts.int_slave
0: system.membus: Adding range [0xa000000000000000:0xa000000000001000]
for id 10
0: system.membus: Received range change from slave port
system.cpu.interrupts.pio
0: system.membus: Adding range [0x2000000000000000:0x2000000000001000]
for id 9
0: system.tol2bus: Received range change from slave port
system.l2.cpu_side
0: system.tol2bus: Got address ranges from all slaves
0: system.tol2bus: Adding range [0:0xffffffffffffffff] for id 0
0: system.tol2bus: Aggregating address ranges
0: system.tol2bus: -- Adding range [0:0xffffffffffffffff]
0: system.membus: Received range change from slave port
system.mem_ctrls0.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=0 a[8]^a[21]=0
a[9]^a[22]=0 for id 0
0: system.membus: Received range change from slave port
system.mem_ctrls1.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=1 a[8]^a[21]=0
a[9]^a[22]=0 for id 1
0: system.membus: Received range change from slave port
system.mem_ctrls2.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=0 a[8]^a[21]=1
a[9]^a[22]=0 for id 2
0: system.membus: Received range change from slave port
system.mem_ctrls3.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=1 a[8]^a[21]=1
a[9]^a[22]=0 for id 3
0: system.membus: Received range change from slave port
system.mem_ctrls4.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=0 a[8]^a[21]=0
a[9]^a[22]=1 for id 4
0: system.membus: Received range change from slave port
system.mem_ctrls5.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=1 a[8]^a[21]=0
a[9]^a[22]=1 for id 5
0: system.membus: Received range change from slave port
system.mem_ctrls6.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=0 a[8]^a[21]=1
a[9]^a[22]=1 for id 6
0: system.membus: Received range change from slave port
system.mem_ctrls7.port
0: system.membus: Adding range [0:0x40000000] a[7]^a[20]=1 a[8]^a[21]=1
a[9]^a[22]=1 for id 7
0: system.membus: Adding snooping master system.l2.mem_side
0: system.membus: Received range change from slave port
system.pim_kernerls.row_sched.instrPort
0: system.membus: Got address ranges from all slaves
0: system.membus: Adding range [0x40000000:0x40000001] for id 8
0: system.membus: Aggregating address ranges
0: system.membus: -- Adding range [0x40000000:0x40000001]
0: system.membus: -- Adding range [0x2000000000000000:0x2000000000001000]
0: system.membus: -- Adding range [0xa000000000000000:0xa000000000001000]
0: system.membus: -- Merging range from 8 ranges
0: system.membus: -- Adding merged range [0:0x40000000]
0: system.tol2bus: Adding snooping master system.cpu.icache.mem_side
0: system.tol2bus: Adding snooping master system.cpu.dcache.mem_side
0: system.tol2bus: Adding snooping master
system.cpu.itb_walker_cache.mem_side
0: system.tol2bus: Adding snooping master
system.cpu.dtb_walker_cache.mem_side
fatal: Unable to find destination for [0x40:0x80] on system.membus
Memory Usage: 1468960 Kbytes
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